A 100 GOPS ASP based baseband processor for wireless communication

Ziyuan Zhu, Shan Tang, Yongtao Su, Juan Han, Gang Sun, Jinglin Shi

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

12 Citations (Scopus)

Abstract

This paper presents an ASP (application specific processor) with 512-bit SIMD (Single Instruction Multiple Data) and 192-bit VLIW (Very Long Instruction Word) architecture optimized for wireless baseband processing. It employs optimized architecture and address generation unit to accelerate the kernel algorithms. Based on the ASP, a multi-core baseband processor is developed which can work at 2×2 MIMO and 20 MHz physical bandwidth configuration for LTE inner receiver and meet requirements of Category 3 User Equipment (CAT3 UE). Furthermore, a silicon implementation of the baseband processor with 130nm CMOS technology is presented. Experimental results show that the baseband processor provides 100 GOPS computing ability at 117.6MHz.

Original languageEnglish
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE 2013
Pages121-124
Number of pages4
Publication statusPublished - 2013
Event16th Design, Automation and Test in Europe Conference and Exhibition, DATE 2013 - Grenoble, France
Duration: 18 Mar 201322 Mar 2013

Other

Other16th Design, Automation and Test in Europe Conference and Exhibition, DATE 2013
CountryFrance
CityGrenoble
Period18/03/1322/03/13

Keywords

  • AGU
  • Application specific processor
  • Baseband processor
  • LTE
  • VLIW

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