A 4-8 GHz CMOS active balun using a compensated single-FET topology

Leigh Milner*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

Abstract

A single-FET active balun has been developed with a phase imbalance of less than ±1.5° and amplitude imbalance less than ±0.6dB from 4 to 8 GHz using 0.25μm silicon-on-sapphire CMOS. The source terminal of the transistor has been compensated with a shunt capacitance to ground and increased value for the source resistance. The compensation network has improved the phase imbalance by 29° at 8 GHz. The circuit dissipates 15mW and is 260×300μm including AC coupling capacitors.

Original languageEnglish
Title of host publicationMicroelectronics
Subtitle of host publicationDesign, Technology, and Packaging III
Volume6798
DOIs
Publication statusPublished - 2008
Externally publishedYes
EventMicroelectronics: Design, Technology, and Packaging III - Canberra, ACT, Australia
Duration: 5 Dec 20077 Dec 2007

Other

OtherMicroelectronics: Design, Technology, and Packaging III
CountryAustralia
CityCanberra, ACT
Period5/12/077/12/07

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    Milner, L. (2008). A 4-8 GHz CMOS active balun using a compensated single-FET topology. In Microelectronics: Design, Technology, and Packaging III (Vol. 6798). [679817] https://doi.org/10.1117/12.758878