A 4-8 GHz CMOS active balun using a compensated single-FET topology

Leigh Milner

doi:10.1117/12.758878

A 4-8 GHz CMOS active balun using a compensated single-FET topology

Leigh Milner^*

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

Abstract

A single-FET active balun has been developed with a phase imbalance of less than ±1.5° and amplitude imbalance less than ±0.6dB from 4 to 8 GHz using 0.25μm silicon-on-sapphire CMOS. The source terminal of the transistor has been compensated with a shunt capacitance to ground and increased value for the source resistance. The compensation network has improved the phase imbalance by 29° at 8 GHz. The circuit dissipates 15mW and is 260×300μm including AC coupling capacitors.

Original language	English
Title of host publication	Microelectronics
Subtitle of host publication	Design, Technology, and Packaging III
Volume	6798
DOIs	https://doi.org/10.1117/12.758878
Publication status	Published - 2008
Externally published	Yes
Event	Microelectronics: Design, Technology, and Packaging III - Canberra, ACT, Australia Duration: 5 Dec 2007 → 7 Dec 2007

Other

Other	Microelectronics: Design, Technology, and Packaging III
Country/Territory	Australia
City	Canberra, ACT
Period	5/12/07 → 7/12/07

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10.1117/12.758878

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title = "A 4-8 GHz CMOS active balun using a compensated single-FET topology",

abstract = "A single-FET active balun has been developed with a phase imbalance of less than ±1.5° and amplitude imbalance less than ±0.6dB from 4 to 8 GHz using 0.25μm silicon-on-sapphire CMOS. The source terminal of the transistor has been compensated with a shunt capacitance to ground and increased value for the source resistance. The compensation network has improved the phase imbalance by 29° at 8 GHz. The circuit dissipates 15mW and is 260×300μm including AC coupling capacitors.",

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year = "2008",

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N2 - A single-FET active balun has been developed with a phase imbalance of less than ±1.5° and amplitude imbalance less than ±0.6dB from 4 to 8 GHz using 0.25μm silicon-on-sapphire CMOS. The source terminal of the transistor has been compensated with a shunt capacitance to ground and increased value for the source resistance. The compensation network has improved the phase imbalance by 29° at 8 GHz. The circuit dissipates 15mW and is 260×300μm including AC coupling capacitors.

AB - A single-FET active balun has been developed with a phase imbalance of less than ±1.5° and amplitude imbalance less than ±0.6dB from 4 to 8 GHz using 0.25μm silicon-on-sapphire CMOS. The source terminal of the transistor has been compensated with a shunt capacitance to ground and increased value for the source resistance. The compensation network has improved the phase imbalance by 29° at 8 GHz. The circuit dissipates 15mW and is 260×300μm including AC coupling capacitors.

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U2 - 10.1117/12.758878

DO - 10.1117/12.758878

M3 - Conference proceeding contribution

AN - SCOPUS:43249090069

SN - 9780819469694

VL - 6798

BT - Microelectronics

T2 - Microelectronics: Design, Technology, and Packaging III

Y2 - 5 December 2007 through 7 December 2007

ER -

A 4-8 GHz CMOS active balun using a compensated single-FET topology

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