A folded-switching mixer in SOI CMOS technology

Ayobami Iji*, Xi Zhu, Michael Heimlich

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

2 Citations (Scopus)

Abstract

A wideband 3.5 to 5.5GHz low voltage folded-switching mixer is implemented in 0.25um SOI CMOS technology. The post-layout simulation of the designed mixer at 4.5GHz has noise figure (NF) of 9.6dB, input IP3 of -9dBm, conversion gain (CG) of 10.9dB and total current consumption including bias is 4.5mA under 1.5V supply voltage. The designed mixer can also operate under 1V supply voltage with relatively small linear performances degradation. The chip area is 0.55×0.5mm 2. Due to high-resistivity silicon substrate, buried oxide isolation and low threshold voltage, SOI CMOS technology offers significant performance improvements for mixers, which makes the designed mixer well suitable for low voltage and low power applications.

Original languageEnglish
Title of host publication2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Place of PublicationPiscataway, N.J
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages458-461
Number of pages4
ISBN (Electronic)9781467325271
ISBN (Print)9781467325264
DOIs
Publication statusPublished - 2012
Event2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012 - Boise, ID, United States
Duration: 5 Aug 20128 Aug 2012

Other

Other2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
CountryUnited States
CityBoise, ID
Period5/08/128/08/12

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Iji, A., Zhu, X., & Heimlich, M. (2012). A folded-switching mixer in SOI CMOS technology. In 2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012 (pp. 458-461). [6292056] Piscataway, N.J: Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/MWSCAS.2012.6292056