A high frequency divider in 0.18 um SiGe BiCMOS technology

Noorfazila Kamal; Yingbo Zhu; Leonard T. Hall; Said F. Al-Sarawi; Craig Burnet; Ian Holland; Adnan Khan; Andre Pollok; Justin Poyner; Michael Boers; James A. Howarth; Adam Lauterbach; Jeffrey Harrison; James Rathmell; Michael Batty; Anthony Parker; Linda M. Davis; William G. Cowley; Neil H E Weste; Derek Abbott

doi:10.1117/12.696294

A high frequency divider in 0.18 um SiGe BiCMOS technology

Noorfazila Kamal^*, Yingbo Zhu, Leonard T. Hall, Said F. Al-Sarawi, Craig Burnet, Ian Holland, Adnan Khan, Andre Pollok, Justin Poyner, Michael Boers, James A. Howarth, Adam Lauterbach, Jeffrey Harrison, James Rathmell, Michael Batty, Anthony Parker, Linda M. Davis, William G. Cowley, Neil H E Weste, Derek Abbott

^*Corresponding author for this work

Faculty of Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

Abstract

High speed frequency dividers are critical parts of frequency synthesisers in wireless systems. These dividers allow the output frequency from a voltage controlled oscillator to be compared with a much lower external reference frequency that is commonly used in these synthesisers. Common trade-offs in high frequency dividers are speed of division, power consumption, real estate area, and output signal dynamic range. In this paper we demonstrate the design of a high frequency, low power divider in 0.18 μm SiGe BiCMOS technology. Three dividers are presented, which are a regenerative divider, a master-slave divider, and a combination of regenerative and master-slave dividers to perform a divide-by-8 chain. The dividers are used as part of a 60 GHz frequency synthesizer. The simulation results are in agreement with measured performance of the regenerative divider. At 48 GHz the divider consumes 18 mW from a 1.8 V supply voltage. The master-slave divider operates up to 36 GHz from a very low supply voltage, 1.8 V. The divide-by-8 operates successfully from 40 GHz to 50 GHz.

Original language	English
Title of host publication	Smart Structures, Devices, and Systems III
Editors	Said F. Al-Sarawi
Place of Publication	Washington, DC
Publisher	SPIE
Pages	1-9
Number of pages	9
Volume	6414
ISBN (Print)	0819465232, 9780819465238
DOIs	https://doi.org/10.1117/12.696294
Publication status	Published - 2007
Event	Smart Structures, Devices, and Systems III - Adelaide, Australia Duration: 11 Dec 2006 → 13 Dec 2006

Other

Other	Smart Structures, Devices, and Systems III
Country/Territory	Australia
City	Adelaide
Period	11/12/06 → 13/12/06

Keywords

60 GHz
Emitter-coupled logic
Frequency synthesizer
Master-slave
Mixer
Regenerative divider

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10.1117/12.696294

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Kamal, N., Zhu, Y., Hall, L. T., Al-Sarawi, S. F., Burnet, C., Holland, I., Khan, A., Pollok, A., Poyner, J., Boers, M., Howarth, J. A., Lauterbach, A., Harrison, J., Rathmell, J., Batty, M., Parker, A., Davis, L. M., Cowley, W. G., Weste, N. H. E., & Abbott, D. (2007). A high frequency divider in 0.18 um SiGe BiCMOS technology. In S. F. Al-Sarawi (Ed.), Smart Structures, Devices, and Systems III (Vol. 6414, pp. 1-9). Article 641408 SPIE. https://doi.org/10.1117/12.696294

@inproceedings{25fc6f3ef3904783b3abfc07dd4fc2aa,

title = "A high frequency divider in 0.18 um SiGe BiCMOS technology",

abstract = "High speed frequency dividers are critical parts of frequency synthesisers in wireless systems. These dividers allow the output frequency from a voltage controlled oscillator to be compared with a much lower external reference frequency that is commonly used in these synthesisers. Common trade-offs in high frequency dividers are speed of division, power consumption, real estate area, and output signal dynamic range. In this paper we demonstrate the design of a high frequency, low power divider in 0.18 μm SiGe BiCMOS technology. Three dividers are presented, which are a regenerative divider, a master-slave divider, and a combination of regenerative and master-slave dividers to perform a divide-by-8 chain. The dividers are used as part of a 60 GHz frequency synthesizer. The simulation results are in agreement with measured performance of the regenerative divider. At 48 GHz the divider consumes 18 mW from a 1.8 V supply voltage. The master-slave divider operates up to 36 GHz from a very low supply voltage, 1.8 V. The divide-by-8 operates successfully from 40 GHz to 50 GHz.",

keywords = "60 GHz, Emitter-coupled logic, Frequency synthesizer, Master-slave, Mixer, Regenerative divider",

author = "Noorfazila Kamal and Yingbo Zhu and Hall, {Leonard T.} and Al-Sarawi, {Said F.} and Craig Burnet and Ian Holland and Adnan Khan and Andre Pollok and Justin Poyner and Michael Boers and Howarth, {James A.} and Adam Lauterbach and Jeffrey Harrison and James Rathmell and Michael Batty and Anthony Parker and Davis, {Linda M.} and Cowley, {William G.} and Weste, {Neil H E} and Derek Abbott",

year = "2007",

doi = "10.1117/12.696294",

language = "English",

isbn = "0819465232",

volume = "6414",

pages = "1--9",

editor = "Al-Sarawi, {Said F.}",

booktitle = "Smart Structures, Devices, and Systems III",

publisher = "SPIE",

address = "United States",

note = "Smart Structures, Devices, and Systems III ; Conference date: 11-12-2006 Through 13-12-2006",

}

Kamal, N, Zhu, Y, Hall, LT, Al-Sarawi, SF, Burnet, C, Holland, I, Khan, A, Pollok, A, Poyner, J, Boers, M, Howarth, JA, Lauterbach, A, Harrison, J, Rathmell, J, Batty, M, Parker, A, Davis, LM, Cowley, WG, Weste, NHE & Abbott, D 2007, A high frequency divider in 0.18 um SiGe BiCMOS technology. in SF Al-Sarawi (ed.), Smart Structures, Devices, and Systems III. vol. 6414, 641408, SPIE, Washington, DC, pp. 1-9, Smart Structures, Devices, and Systems III, Adelaide, Australia, 11/12/06. https://doi.org/10.1117/12.696294

TY - GEN

T1 - A high frequency divider in 0.18 um SiGe BiCMOS technology

AU - Kamal, Noorfazila

AU - Zhu, Yingbo

AU - Hall, Leonard T.

AU - Al-Sarawi, Said F.

AU - Burnet, Craig

AU - Holland, Ian

AU - Khan, Adnan

AU - Pollok, Andre

AU - Poyner, Justin

AU - Boers, Michael

AU - Howarth, James A.

AU - Lauterbach, Adam

AU - Harrison, Jeffrey

AU - Rathmell, James

AU - Batty, Michael

AU - Parker, Anthony

AU - Davis, Linda M.

AU - Cowley, William G.

AU - Weste, Neil H E

AU - Abbott, Derek

PY - 2007

Y1 - 2007

N2 - High speed frequency dividers are critical parts of frequency synthesisers in wireless systems. These dividers allow the output frequency from a voltage controlled oscillator to be compared with a much lower external reference frequency that is commonly used in these synthesisers. Common trade-offs in high frequency dividers are speed of division, power consumption, real estate area, and output signal dynamic range. In this paper we demonstrate the design of a high frequency, low power divider in 0.18 μm SiGe BiCMOS technology. Three dividers are presented, which are a regenerative divider, a master-slave divider, and a combination of regenerative and master-slave dividers to perform a divide-by-8 chain. The dividers are used as part of a 60 GHz frequency synthesizer. The simulation results are in agreement with measured performance of the regenerative divider. At 48 GHz the divider consumes 18 mW from a 1.8 V supply voltage. The master-slave divider operates up to 36 GHz from a very low supply voltage, 1.8 V. The divide-by-8 operates successfully from 40 GHz to 50 GHz.

AB - High speed frequency dividers are critical parts of frequency synthesisers in wireless systems. These dividers allow the output frequency from a voltage controlled oscillator to be compared with a much lower external reference frequency that is commonly used in these synthesisers. Common trade-offs in high frequency dividers are speed of division, power consumption, real estate area, and output signal dynamic range. In this paper we demonstrate the design of a high frequency, low power divider in 0.18 μm SiGe BiCMOS technology. Three dividers are presented, which are a regenerative divider, a master-slave divider, and a combination of regenerative and master-slave dividers to perform a divide-by-8 chain. The dividers are used as part of a 60 GHz frequency synthesizer. The simulation results are in agreement with measured performance of the regenerative divider. At 48 GHz the divider consumes 18 mW from a 1.8 V supply voltage. The master-slave divider operates up to 36 GHz from a very low supply voltage, 1.8 V. The divide-by-8 operates successfully from 40 GHz to 50 GHz.

KW - 60 GHz

KW - Emitter-coupled logic

KW - Frequency synthesizer

KW - Master-slave

KW - Mixer

KW - Regenerative divider

UR - http://www.scopus.com/inward/record.url?scp=34247396224&partnerID=8YFLogxK

U2 - 10.1117/12.696294

DO - 10.1117/12.696294

M3 - Conference proceeding contribution

AN - SCOPUS:34247396224

SN - 0819465232

SN - 9780819465238

VL - 6414

SP - 1

EP - 9

BT - Smart Structures, Devices, and Systems III

A2 - Al-Sarawi, Said F.

PB - SPIE

CY - Washington, DC

T2 - Smart Structures, Devices, and Systems III

Y2 - 11 December 2006 through 13 December 2006

ER -

A high frequency divider in 0.18 um SiGe BiCMOS technology

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