A multi-bit sigma-delta ADC with an FIR DAC loop filter

Jeffrey Harrison, Neil Weste

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

Original languageEnglish
Title of host publicationIEEJ 2000
Subtitle of host publicationproceedings of the 4th International Analog VLSI Workshop
Place of PublicationJapan
PublisherInstitute of Electrical Engineers of Japan (IEEJ)
Pages26-31
Number of pages6
Publication statusPublished - 2000
EventIEEJ International Analog VLSI Workshop (4th : 2000) - Stockholm, Sweden
Duration: 2 Jun 20003 Jun 2000

Workshop

WorkshopIEEJ International Analog VLSI Workshop (4th : 2000)
CityStockholm, Sweden
Period2/06/003/06/00

Cite this

Harrison, J., & Weste, N. (2000). A multi-bit sigma-delta ADC with an FIR DAC loop filter. In IEEJ 2000: proceedings of the 4th International Analog VLSI Workshop (pp. 26-31). Japan: Institute of Electrical Engineers of Japan (IEEJ).