A simple digital architecture for a harmonic-cancelling sine-wave synthesizer

Pasindu Aluthwala; Neil Weste; Andrew Adams; Torsten Lehmann; Sri Parameswaran

doi:10.1109/ISCAS.2014.6865584

A simple digital architecture for a harmonic-cancelling sine-wave synthesizer

Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

15 Citations (Scopus)

Abstract

Sine-wave synthesizers are a core requirement in many electronic applications, such as communication systems, and test and verification of analog/mixed-signal electronic systems. In sine-wave synthesizers, there exists a compromise between output spectral purity and hardware complexity. Harmonic-cancelling sine-wave synthesizers (HCSSs) allow spectrally pure signal synthesis at low hardware cost, compared to conventional sine-wave synthesis approaches. In this paper, we propose a digital HCSS hardware architecture, which is simpler, more hardware efficient and more programmable compared to state of the art HCSSs. The proposed architecture has been verified through a prototype built from an FPGA and discrete components. Prototype results demonstrate 51.9 dBc spurious free dynamic range (SFDR) and an output frequency range from 100 Hz to 100 kHz.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems : ISCAS 2014
Subtitle of host publication	proceedings
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	2113-2116
Number of pages	4
ISBN (Electronic)	9781479934324, 9781479934317
ISBN (Print)	9781479934331
DOIs	https://doi.org/10.1109/ISCAS.2014.6865584
Publication status	Published - 2014
Externally published	Yes
Event	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia Duration: 1 Jun 2014 → 5 Jun 2014

Other

Other	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Country/Territory	Australia
City	Melbourne, VIC
Period	1/06/14 → 5/06/14

Keywords

Sinusoids
digital-oscillator
low harmonic distortion

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10.1109/ISCAS.2014.6865584

Cite this

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title = "A simple digital architecture for a harmonic-cancelling sine-wave synthesizer",

abstract = "Sine-wave synthesizers are a core requirement in many electronic applications, such as communication systems, and test and verification of analog/mixed-signal electronic systems. In sine-wave synthesizers, there exists a compromise between output spectral purity and hardware complexity. Harmonic-cancelling sine-wave synthesizers (HCSSs) allow spectrally pure signal synthesis at low hardware cost, compared to conventional sine-wave synthesis approaches. In this paper, we propose a digital HCSS hardware architecture, which is simpler, more hardware efficient and more programmable compared to state of the art HCSSs. The proposed architecture has been verified through a prototype built from an FPGA and discrete components. Prototype results demonstrate 51.9 dBc spurious free dynamic range (SFDR) and an output frequency range from 100 Hz to 100 kHz.",

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author = "Pasindu Aluthwala and Neil Weste and Andrew Adams and Torsten Lehmann and Sri Parameswaran",

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doi = "10.1109/ISCAS.2014.6865584",

language = "English",

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pages = "2113--2116",

booktitle = "IEEE International Symposium on Circuits and Systems : ISCAS 2014",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

note = "2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 ; Conference date: 01-06-2014 Through 05-06-2014",

}

Aluthwala, P, Weste, N, Adams, A, Lehmann, T & Parameswaran, S 2014, A simple digital architecture for a harmonic-cancelling sine-wave synthesizer. in IEEE International Symposium on Circuits and Systems : ISCAS 2014: proceedings. Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, pp. 2113-2116, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, Melbourne, VIC, Australia, 1/06/14. https://doi.org/10.1109/ISCAS.2014.6865584

A simple digital architecture for a harmonic-cancelling sine-wave synthesizer. / Aluthwala, Pasindu; Weste, Neil; Adams, Andrew et al.
IEEE International Symposium on Circuits and Systems : ISCAS 2014: proceedings. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE), 2014. p. 2113-2116.

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

TY - GEN

T1 - A simple digital architecture for a harmonic-cancelling sine-wave synthesizer

AU - Aluthwala, Pasindu

AU - Weste, Neil

AU - Adams, Andrew

AU - Lehmann, Torsten

AU - Parameswaran, Sri

PY - 2014

Y1 - 2014

N2 - Sine-wave synthesizers are a core requirement in many electronic applications, such as communication systems, and test and verification of analog/mixed-signal electronic systems. In sine-wave synthesizers, there exists a compromise between output spectral purity and hardware complexity. Harmonic-cancelling sine-wave synthesizers (HCSSs) allow spectrally pure signal synthesis at low hardware cost, compared to conventional sine-wave synthesis approaches. In this paper, we propose a digital HCSS hardware architecture, which is simpler, more hardware efficient and more programmable compared to state of the art HCSSs. The proposed architecture has been verified through a prototype built from an FPGA and discrete components. Prototype results demonstrate 51.9 dBc spurious free dynamic range (SFDR) and an output frequency range from 100 Hz to 100 kHz.

AB - Sine-wave synthesizers are a core requirement in many electronic applications, such as communication systems, and test and verification of analog/mixed-signal electronic systems. In sine-wave synthesizers, there exists a compromise between output spectral purity and hardware complexity. Harmonic-cancelling sine-wave synthesizers (HCSSs) allow spectrally pure signal synthesis at low hardware cost, compared to conventional sine-wave synthesis approaches. In this paper, we propose a digital HCSS hardware architecture, which is simpler, more hardware efficient and more programmable compared to state of the art HCSSs. The proposed architecture has been verified through a prototype built from an FPGA and discrete components. Prototype results demonstrate 51.9 dBc spurious free dynamic range (SFDR) and an output frequency range from 100 Hz to 100 kHz.

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KW - digital-oscillator

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DO - 10.1109/ISCAS.2014.6865584

M3 - Conference proceeding contribution

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SN - 9781479934331

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BT - IEEE International Symposium on Circuits and Systems : ISCAS 2014

PB - Institute of Electrical and Electronics Engineers (IEEE)

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T2 - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014

Y2 - 1 June 2014 through 5 June 2014

ER -

A simple digital architecture for a harmonic-cancelling sine-wave synthesizer

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