A systematic methodology for time-multiplexing algorithms on a reconfigurable system-on-chip

Duc Dung Vu*, Sanat K. Biswas, Alan Kan, Ediz Cetin

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review

Abstract

This paper introduces a methodology for hardware-software co-implementation, designed to simplify the System-on-Chip (SoC) design process when attempting to time-multiplex hardware. The approach streamlines the transformation of complex algorithms into efficient SoC implementations by providing a recipe for seamless hardware-software partitioning. As a case study, the methodology is applied to the Extrapolated Single Propagation Particle Filter algorithm for geo-locating sources of radio frequency interference and results demonstrate a considerable speed-up when using a time-multiplexed implementation.
Original languageEnglish
Title of host publication2025 IEEE International Symposium on Circuits and Systems (ISCAS)
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages5
ISBN (Electronic)9798350356830
ISBN (Print)9798350356847
DOIs
Publication statusPublished - 2025
Event2025 IEEE International Symposium on Circuits and Systems (ISCAS) - London, United Kingdom
Duration: 25 May 202528 May 2025

Publication series

Name
ISSN (Print)0271-4302
ISSN (Electronic)2158-1525

Conference

Conference2025 IEEE International Symposium on Circuits and Systems (ISCAS)
Abbreviated titleISCAS 2025
Country/TerritoryUnited Kingdom
CityLondon
Period25/05/2528/05/25

Bibliographical note

Alternative title of the host publication : "IEEE ISCAS 2025 Symposium proceedings"

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