A systolic processing element for speech recognition

Neil H.E. Weste; David  J. Burr; Bryan D. Ackland

doi:10.1109/ISSCC.1982.1156321

A systolic processing element for speech recognition

Neil H.E. Weste, David J. Burr, Bryan D. Ackland

Research output: Contribution to journal › Conference paper › peer-review

Abstract

An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.

Original language	English
Pages (from-to)	274-275
Number of pages	2
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	25
DOIs	https://doi.org/10.1109/ISSCC.1982.1156321
Publication status	Published - 1982
Externally published	Yes
Event	1982 IEEE International solid-state circuits conference - San Francisco, United States Duration: 10 Feb 1982 → 12 Feb 1982

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10.1109/ISSCC.1982.1156321

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@article{a7316fa437344fd3958c7cc3cc21e3f2,

title = "A systolic processing element for speech recognition",

abstract = "An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.",

author = "Weste, {Neil H.E.} and Burr, {David J.} and Ackland, {Bryan D.}",

year = "1982",

doi = "10.1109/ISSCC.1982.1156321",

language = "English",

volume = "25",

pages = "274--275",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

note = "1982 IEEE International solid-state circuits conference, ISSCC 82 ; Conference date: 10-02-1982 Through 12-02-1982",

}

TY - JOUR

T1 - A systolic processing element for speech recognition

AU - Weste, Neil H.E.

AU - Burr, David J.

AU - Ackland, Bryan D.

PY - 1982

Y1 - 1982

N2 - An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.

AB - An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.

U2 - 10.1109/ISSCC.1982.1156321

DO - 10.1109/ISSCC.1982.1156321

M3 - Conference paper

SN - 0193-6530

VL - 25

SP - 274

EP - 275

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - 1982 IEEE International solid-state circuits conference

Y2 - 10 February 1982 through 12 February 1982

ER -

A systolic processing element for speech recognition

Abstract

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