ln a previous paper an array architecture was revealed for real-time dynamic time warping. An integrated processor was designed and built for use in such an array. This paper discusses reduced arrays which allow a continuum of tradeoffs between speed and circuit complexity. Reduced arrays permit design of fixed-size systems for problems which are unbounded in size.
|Number of pages||10|
|Journal||IEEE Transactions on Acoustics, Speech, and Signal Processing|
|Publication status||Published - 1984|