Array Configurations for Dynamic Time Warping

David J. Burr, Bryan D. Ackland, Neil Weste

Research output: Contribution to journalArticlepeer-review

14 Citations (Scopus)


ln a previous paper an array architecture was revealed for real-time dynamic time warping. An integrated processor was designed and built for use in such an array. This paper discusses reduced arrays which allow a continuum of tradeoffs between speed and circuit complexity. Reduced arrays permit design of fixed-size systems for problems which are unbounded in size.

Original languageEnglish
Pages (from-to)119-128
Number of pages10
JournalIEEE Transactions on Acoustics, Speech, and Signal Processing
Issue number1
Publication statusPublished - 1984
Externally publishedYes


Dive into the research topics of 'Array Configurations for Dynamic Time Warping'. Together they form a unique fingerprint.

Cite this