Assessment of NBTI in presence of self-heating in high-k SOI FinFETs

Udit Monga; Sourabh Khandelwal; Jasmin Aghassi; Josef Sedlmeir; Tor A. Fjeldly

doi:10.1109/LED.2012.2213572

Assessment of NBTI in presence of self-heating in high-k SOI FinFETs

Udit Monga, Sourabh Khandelwal, Jasmin Aghassi, Josef Sedlmeir, Tor A. Fjeldly

Research output: Contribution to journal › Article › peer-review

11 Citations (Scopus)

Abstract

We have experimentally investigated the threshold voltage shift due to negative bias temperature instability (NBTI). The NBTI stress in the absence of self-heating (SH) is performed at two different temperatures, i.e., T = 25°C and 125°C, at bias conditions: gate voltage Vgs = -2 V and drain voltage Vds = 0 V. To evaluate the effect of NBTI in the presence of SH, the stress is performed at room temperature and at Vgs = -2 V and Vds = -1 V. It has been observed that NBTI in the presence of SH causes a significant shift in the threshold voltage.

Original language	English
Pages (from-to)	1532-1534
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	33
Issue number	11
DOIs	https://doi.org/10.1109/LED.2012.2213572
Publication status	Published - 2012
Externally published	Yes

Keywords

FinFET
negative bias temperature instability (NBTI)
reliability
self-heating (SH)
silicon-on-insulator (SOI)
thermal resistance

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title = "Assessment of NBTI in presence of self-heating in high-k SOI FinFETs",

abstract = "We have experimentally investigated the threshold voltage shift due to negative bias temperature instability (NBTI). The NBTI stress in the absence of self-heating (SH) is performed at two different temperatures, i.e., T = 25°C and 125°C, at bias conditions: gate voltage Vgs = -2 V and drain voltage Vds = 0 V. To evaluate the effect of NBTI in the presence of SH, the stress is performed at room temperature and at Vgs = -2 V and Vds = -1 V. It has been observed that NBTI in the presence of SH causes a significant shift in the threshold voltage.",

keywords = "FinFET, negative bias temperature instability (NBTI), reliability, self-heating (SH), silicon-on-insulator (SOI), thermal resistance",

author = "Udit Monga and Sourabh Khandelwal and Jasmin Aghassi and Josef Sedlmeir and Fjeldly, {Tor A.}",

year = "2012",

doi = "10.1109/LED.2012.2213572",

language = "English",

volume = "33",

pages = "1532--1534",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

number = "11",

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T1 - Assessment of NBTI in presence of self-heating in high-k SOI FinFETs

AU - Monga, Udit

AU - Khandelwal, Sourabh

AU - Aghassi, Jasmin

AU - Sedlmeir, Josef

AU - Fjeldly, Tor A.

PY - 2012

Y1 - 2012

N2 - We have experimentally investigated the threshold voltage shift due to negative bias temperature instability (NBTI). The NBTI stress in the absence of self-heating (SH) is performed at two different temperatures, i.e., T = 25°C and 125°C, at bias conditions: gate voltage Vgs = -2 V and drain voltage Vds = 0 V. To evaluate the effect of NBTI in the presence of SH, the stress is performed at room temperature and at Vgs = -2 V and Vds = -1 V. It has been observed that NBTI in the presence of SH causes a significant shift in the threshold voltage.

AB - We have experimentally investigated the threshold voltage shift due to negative bias temperature instability (NBTI). The NBTI stress in the absence of self-heating (SH) is performed at two different temperatures, i.e., T = 25°C and 125°C, at bias conditions: gate voltage Vgs = -2 V and drain voltage Vds = 0 V. To evaluate the effect of NBTI in the presence of SH, the stress is performed at room temperature and at Vgs = -2 V and Vds = -1 V. It has been observed that NBTI in the presence of SH causes a significant shift in the threshold voltage.

KW - FinFET

KW - negative bias temperature instability (NBTI)

KW - reliability

KW - self-heating (SH)

KW - silicon-on-insulator (SOI)

KW - thermal resistance

U2 - 10.1109/LED.2012.2213572

DO - 10.1109/LED.2012.2213572

M3 - Article

VL - 33

SP - 1532

EP - 1534

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 11

ER -