Abstract
MULGA is a proven symbolic design system based on the free form placement of symbolic circuit components on a virtual (topological) grid. In its original implementation, the authors concentrated on the capture and verification of good leaf cell designs and their correct transformation to geometric data. Over a period of time, a formal strategy for the assembly of symbolic leaf cells into larger modules has evolved. In this paper we describe our overall design philosphy and its current implementation. In so doing, we advance the concept that a detailed floor plan is a valid structural description of a chip. A set of structural (floor plan) design rules, similar to those used in hierarchical geometric systems, are provided. The paper also describes a proposed assembly tool which directs these compaction, pitch matching, circuit interpretation and mask data generation operations according to the structural floor plan. This tool is currently under development.
| Original language | English |
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| Title of host publication | VLSI '83 : VLSI design of digital systems : proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, Trondheim, Norway, 16-19 August 1983 |
| Editors | F. Anceau, Einar J. Aas |
| Place of Publication | Amsterdam; New York |
| Publisher | North-Holland |
| Pages | 457-466 |
| Number of pages | 10 |
| ISBN (Print) | 0444867511 |
| Publication status | Published - 1983 |
| Externally published | Yes |