Abstract
Many common DSP tasks can be formulated in terms of multiple-operand addition, allowing the use of column-sum (i. e. carry-save) techniques. In bit-serial form, performance superior to word-wide DSP micro-processors can then be achieved. A novel pass transistor implementation of the required (p,q) parallel counters consumes less power and area than previous schemes.
Original language | English |
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Title of host publication | National Conference Publication - Institution of Engineers, Australia |
Publisher | Inst of Engineers |
Pages | 148-149 |
Number of pages | 2 |
ISBN (Print) | 0858253461 |
Publication status | Published - 1987 |
Externally published | Yes |