@inproceedings{709aa8885c81473796408ee288b677b3,
title = "BSIM-CMG: Standard FinFET compact model for advanced circuit design",
abstract = "This work presents new compact models that capture advanced physical effects presented in industry FinFETs. The presented models are introduced into the industry standard compact model BSIM-CMG. The core model is updated with a new unified FinFET model, which calculates charges and currents of transistors with complex fin cross-sections. In addition, threshold voltage modulation from bulk-bias effects and bias dependent quantum mechanical confinement effects are incorporated into the new core model. Short channel effects, affecting threshold voltage and subhtreshold swing, are modeled with a new unified field penetration length, enabling accurate 14nm node FinFET modeling. The new proposed models further assure the BSIM-CMG model's capabilities for circuit design using FinFET transistors for advanced technology nodes.",
author = "Duarte, {Juan P.} and Sourabh Khandelwal and Aditya Medury and Chenming Hu and Pragya Kushwaha and Harshit Agarwal and Avirup Dasgupta and Chauhan, {Yogesh S.}",
year = "2015",
month = oct,
day = "30",
doi = "10.1109/ESSCIRC.2015.7313862",
language = "English",
isbn = "9781467374705",
series = "Proceedings of ESSCIRC",
publisher = "Institute of Electrical and Electronics Engineers (IEEE)",
pages = "196--201",
editor = "Pribyl, {Wolfgang } and Dielacher, {Franz } and Hueber, {Gernot }",
booktitle = "ESSCIRC 2015",
address = "United States",
note = "41st European Solid-State Circuits Conference, ESSCIRC 2015 ; Conference date: 14-09-2015 Through 18-09-2015",
}