CAD models of losses for slotline on multilayered dielectric substrates

Payal Majumdar; A. K. Verma

doi:10.1109/PIERS.2016.7735282

CAD models of losses for slotline on multilayered dielectric substrates

Payal Majumdar, A. K. Verma

School of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

Abstract

This paper addresses an accurate CAD oriented integrated closed-form model for the computation of losses for planar and non-planar slotline on a finite-thickness multilayered dielectric substrates. The analysis of the structures has been done using conformal mapping and single layer reduction (SLR) technique. The validity of the proposed integrated model is tested over wide range of parameters: 1 GHz ≤ f ≤ 60 GHz, 0 μm ≤ t ≤ 50 μm, 2.2 ≤ ϵ_r ≤ 20 and 0.02 ≤ w/h ≤ 1.0 against the 3D-EM simulated results. The average deviation of the model against the comparison is 3.4%.

Original language	English
Title of host publication	2016 Progress In Electromagnetics Research Symposium, PIERS 2016 - Proceedings
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	3277-3282
Number of pages	6
ISBN (Electronic)	9781509060931
DOIs	https://doi.org/10.1109/PIERS.2016.7735282
Publication status	Published - 3 Nov 2016
Event	2016 Progress In Electromagnetics Research Symposium, PIERS 2016 - Shanghai, China Duration: 8 Aug 2016 → 11 Aug 2016

Other

Other	2016 Progress In Electromagnetics Research Symposium, PIERS 2016
Country/Territory	China
City	Shanghai
Period	8/08/16 → 11/08/16

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10.1109/PIERS.2016.7735282

Cite this

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title = "CAD models of losses for slotline on multilayered dielectric substrates",

abstract = "This paper addresses an accurate CAD oriented integrated closed-form model for the computation of losses for planar and non-planar slotline on a finite-thickness multilayered dielectric substrates. The analysis of the structures has been done using conformal mapping and single layer reduction (SLR) technique. The validity of the proposed integrated model is tested over wide range of parameters: 1 GHz ≤ f ≤ 60 GHz, 0 μm ≤ t ≤ 50 μm, 2.2 ≤ ϵr ≤ 20 and 0.02 ≤ w/h ≤ 1.0 against the 3D-EM simulated results. The average deviation of the model against the comparison is 3.4%.",

author = "Payal Majumdar and Verma, {A. K.}",

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doi = "10.1109/PIERS.2016.7735282",

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booktitle = "2016 Progress In Electromagnetics Research Symposium, PIERS 2016 - Proceedings",

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note = "2016 Progress In Electromagnetics Research Symposium, PIERS 2016 ; Conference date: 08-08-2016 Through 11-08-2016",

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Majumdar, P & Verma, AK 2016, CAD models of losses for slotline on multilayered dielectric substrates. in 2016 Progress In Electromagnetics Research Symposium, PIERS 2016 - Proceedings., 7735282, Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, pp. 3277-3282, 2016 Progress In Electromagnetics Research Symposium, PIERS 2016, Shanghai, China, 8/08/16. https://doi.org/10.1109/PIERS.2016.7735282

CAD models of losses for slotline on multilayered dielectric substrates. / Majumdar, Payal; Verma, A. K.
2016 Progress In Electromagnetics Research Symposium, PIERS 2016 - Proceedings. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE), 2016. p. 3277-3282 7735282.

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

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N2 - This paper addresses an accurate CAD oriented integrated closed-form model for the computation of losses for planar and non-planar slotline on a finite-thickness multilayered dielectric substrates. The analysis of the structures has been done using conformal mapping and single layer reduction (SLR) technique. The validity of the proposed integrated model is tested over wide range of parameters: 1 GHz ≤ f ≤ 60 GHz, 0 μm ≤ t ≤ 50 μm, 2.2 ≤ ϵr ≤ 20 and 0.02 ≤ w/h ≤ 1.0 against the 3D-EM simulated results. The average deviation of the model against the comparison is 3.4%.

AB - This paper addresses an accurate CAD oriented integrated closed-form model for the computation of losses for planar and non-planar slotline on a finite-thickness multilayered dielectric substrates. The analysis of the structures has been done using conformal mapping and single layer reduction (SLR) technique. The validity of the proposed integrated model is tested over wide range of parameters: 1 GHz ≤ f ≤ 60 GHz, 0 μm ≤ t ≤ 50 μm, 2.2 ≤ ϵr ≤ 20 and 0.02 ≤ w/h ≤ 1.0 against the 3D-EM simulated results. The average deviation of the model against the comparison is 3.4%.

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CAD models of losses for slotline on multilayered dielectric substrates

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