Circuit model for double-energy-level trap centers in GaN HEMTs

Sayed Ali Albahrani, Anthony Parker*, Michael Heimlich

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

Measurement results performed on a GaN high-electron-mobility transistor that show the presence of a double-energy-level (DEL) trap center in the device are presented. A novel, yet simple, circuit implementation of a DEL trap center in an FET is presented that is immediately extendable to a trap center with more than two energy levels. The model is based on the Shockley-Read-Hall statistics of the trapping process. The implementation is suitable for both time-domain and harmonic-balance simulations. Simulation results validate the proposed model.

Original languageEnglish
Pages (from-to)998-1006
Number of pages9
JournalIEEE Transactions on Electron Devices
Volume64
Issue number3
DOIs
Publication statusPublished - Mar 2017

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