TY - JOUR
T1 - Circuit model for double-energy-level trap centers in GaN HEMTs
AU - Albahrani, Sayed Ali
AU - Parker, Anthony
AU - Heimlich, Michael
PY - 2017/3
Y1 - 2017/3
N2 - Measurement results performed on a GaN high-electron-mobility transistor that show the presence of a double-energy-level (DEL) trap center in the device are presented. A novel, yet simple, circuit implementation of a DEL trap center in an FET is presented that is immediately extendable to a trap center with more than two energy levels. The model is based on the Shockley-Read-Hall statistics of the trapping process. The implementation is suitable for both time-domain and harmonic-balance simulations. Simulation results validate the proposed model.
AB - Measurement results performed on a GaN high-electron-mobility transistor that show the presence of a double-energy-level (DEL) trap center in the device are presented. A novel, yet simple, circuit implementation of a DEL trap center in an FET is presented that is immediately extendable to a trap center with more than two energy levels. The model is based on the Shockley-Read-Hall statistics of the trapping process. The implementation is suitable for both time-domain and harmonic-balance simulations. Simulation results validate the proposed model.
UR - http://www.scopus.com/inward/record.url?scp=85010645186&partnerID=8YFLogxK
U2 - 10.1109/TED.2017.2650241
DO - 10.1109/TED.2017.2650241
M3 - Article
VL - 64
SP - 998
EP - 1006
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
SN - 0018-9383
IS - 3
ER -