Color graphics system for I. C. mask design and analysis

N. Weste*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review


A program is described which is capable of deriving the node table, transistor parameters and parasitic effects for a MOS circuit displayed on the graphics monitor. The output format of this program is in a form suitable for direct input to a general circuit analysis program. The algorithms which use a topological mapping approach shown to have possible execution time benefits over previous methods while maintaining the overwhelming advantage of user interaction. The relationship of this approach to more automated systems is also treated.

Original languageEnglish
Title of host publicationProceedings of the 15th Design Automation Conference
Place of PublicationPiscataway, N.J.
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages7
Publication statusPublished - 1978
Externally publishedYes
Event15th Design Automation Conference - Las Vegas, United States
Duration: 19 Jun 197821 Jun 1978


Conference15th Design Automation Conference
Country/TerritoryUnited States
CityLas Vegas


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