Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

Hossein Eslahi; Tara J. Hamilton; Sourabh Khandelwal

doi:10.1109/TNANO.2022.3157585

Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

Hossein Eslahi, Tara J. Hamilton, Sourabh Khandelwal

School of Engineering

Research output: Contribution to journal › Article › peer-review

7 Citations (Scopus)

Abstract

In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30 μm2, this is the smallest neuron circuit reported to date.

Original language	English
Pages (from-to)	189-195
Number of pages	7
Journal	IEEE Transactions on Nanotechnology
Volume	21
DOIs	https://doi.org/10.1109/TNANO.2022.3157585
Publication status	Published - 2022

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abstract = "In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30 μm2, this is the smallest neuron circuit reported to date.",

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AB - In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30 μm2, this is the smallest neuron circuit reported to date.

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Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

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