TY - JOUR
T1 - Consistent surface-potential-based modeling of drain and gate currents in AlGaN/GaN HEMTs
AU - Albahrani, Sayed Ali
AU - Heuken, Lars
AU - Schwantuschke, Dirk
AU - Gneiting, Thomas
AU - Burghartz, Joachim N.
AU - Khandelwal, Sourabh
N1 - Version archived for private and non-commercial use with the permission of the author/s and according to publisher conditions. For further rights please contact the publisher.
PY - 2020/2
Y1 - 2020/2
N2 - In this article, the gate current in AlGaN/GaN high-electron mobility transistors is modeled in a surface potential-based compact model. The thermionic emission, the Poole-Frenkel emission, and the Fowler-Nordheim tunneling are the dominant mechanisms for the gate current in the forward-and reverse-bias regions. These conduction mechanisms are modeled within the framework of the ASM-GaN compact model, which is a physics-based industry-standard model for GaN HEMTs, hence yielding a consistent model for the drain and gate currents. The proposed model captures the gate voltage, drain voltage, temperature, and gate-length dependencies of the gate current. The results of dc gate-leakage measurements of two GaN HEMT, differing only in terms of gate length, over a wide range of temperature, showing these current-conduction mechanisms, are presented, and the proposed model is validated accordingly. The developed gate current model, implemented in Verilog-A, is in excellent agreement with the experimental data.
AB - In this article, the gate current in AlGaN/GaN high-electron mobility transistors is modeled in a surface potential-based compact model. The thermionic emission, the Poole-Frenkel emission, and the Fowler-Nordheim tunneling are the dominant mechanisms for the gate current in the forward-and reverse-bias regions. These conduction mechanisms are modeled within the framework of the ASM-GaN compact model, which is a physics-based industry-standard model for GaN HEMTs, hence yielding a consistent model for the drain and gate currents. The proposed model captures the gate voltage, drain voltage, temperature, and gate-length dependencies of the gate current. The results of dc gate-leakage measurements of two GaN HEMT, differing only in terms of gate length, over a wide range of temperature, showing these current-conduction mechanisms, are presented, and the proposed model is validated accordingly. The developed gate current model, implemented in Verilog-A, is in excellent agreement with the experimental data.
UR - http://www.scopus.com/inward/record.url?scp=85078892902&partnerID=8YFLogxK
U2 - 10.1109/TED.2019.2961773
DO - 10.1109/TED.2019.2961773
M3 - Article
AN - SCOPUS:85078892902
SN - 0018-9383
VL - 67
SP - 455
EP - 462
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 2
ER -