Design and low-power implementation of an adaptive image rejection receiver

Ediz Cetin*, Sinan Topcu, Izzet Kale, Richard C S Morling

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

6 Citations (Scopus)

Abstract

This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver basedt on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures.

Original languageEnglish
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Place of PublicationPiscataway, New Jersey
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages3146-3149
Number of pages4
ISBN (Print)9781424416844
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: 18 May 200821 May 2008

Other

Other2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
CountryUnited States
CitySeattle, WA
Period18/05/0821/05/08

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  • Cite this

    Cetin, E., Topcu, S., Kale, I., & Morling, R. C. S. (2008). Design and low-power implementation of an adaptive image rejection receiver. In 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 (pp. 3146-3149). [4542125] Piscataway, New Jersey: Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ISCAS.2008.4542125