Abstract
This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver basedt on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures.
| Original language | English |
|---|---|
| Title of host publication | 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 |
| Place of Publication | Piscataway, New Jersey |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | 3146-3149 |
| Number of pages | 4 |
| ISBN (Print) | 9781424416844 |
| DOIs | |
| Publication status | Published - 2008 |
| Externally published | Yes |
| Event | 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States Duration: 18 May 2008 → 21 May 2008 |
Other
| Other | 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 |
|---|---|
| Country/Territory | United States |
| City | Seattle, WA |
| Period | 18/05/08 → 21/05/08 |
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