Abstract
An on-chip sine-wave synthesizer design with fast programmability and low hardware cost is presented. The design makes use of a harmonic cancellation technique to digitally synthesize an approximation to a sine-wave, which does not contain lower order harmonic distortions. The remaining higher order harmonics are attenuated with the use of a low pass filter (LPF) to synthesize a spectrally pure sine-wave. The simple nature of the sine-wave synthesis approach allows for a design with low hardware cost while maintaining high output spectral purity. The generic design of the aptly named digital harmonic-cancelling sine-wave synthesizer (DHSS) is discussed along with parasitic extracted simulation results from a prototype designed in a 0.13 μm CMOS process. Simulation results demonstrate that the DHSS prototype is capable of synthesizing up to 100 MHz output frequency, with 43.5 dB SFDR, while consuming only 2.26 mW of power.
| Original language | English |
|---|---|
| Title of host publication | ISCAS 2015 |
| Subtitle of host publication | Proceedings of the 2015 IEEE International Symposium on Circuits and Systems |
| Place of Publication | Piscataway, NJ |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | 3052-3055 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781479983919 |
| ISBN (Print) | 9781479983926 |
| DOIs | |
| Publication status | Published - 27 Jul 2015 |
| Externally published | Yes |
| Event | IEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal Duration: 24 May 2015 → 27 May 2015 |
Other
| Other | IEEE International Symposium on Circuits and Systems, ISCAS 2015 |
|---|---|
| Country/Territory | Portugal |
| City | Lisbon |
| Period | 24/05/15 → 27/05/15 |
Keywords
- harmonic cancelling
- low THD
- Sinusoid oscillator