Design of an algorithmic Wallace multiplier using high speed counters

Shahzad Asif, Yinan Kong

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

16 Citations (Scopus)

Abstract

Wallace tree multipliers provide a power-efficient strategy for high speed multiplication. The use of high speed 7?3 counters in the Wallace tree reduction can further improve the multiplier speed. This paper presents an algorithmic approach to construct the counter based Wallace tree multipliers. The proposed algorithm can be used to implement the efficient counter based Wallace multiplier of any size suitable for FPGA or ASIC synthesis tools. The designs are synthesized in Synopsys Design Compiler using 90 nm CMOS technology. The detailed comparison of traditional and counter based Wallace multipliers is performed which shows that the counter based Wallace multiplier is up to 22% faster as compared to the traditional Wallace multiplier.

Original languageEnglish
Title of host publicationProceedings - 2015 10th International Conference on Computer Engineering and Systems, ICCES 2015
EditorsWahied Gharieb Ali Abdelaal, M. Watheq El-Kharashi, Ayman M. Bahaa El-Din, Mohamad Taher, Ahmed M. Zaki
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages133-138
Number of pages6
ISBN (Electronic)9781467399715
DOIs
Publication statusPublished - 2015
Event10th International Conference on Computer Engineering and Systems, ICCES 2015 - Cairo, Egypt
Duration: 23 Dec 201524 Dec 2015

Other

Other10th International Conference on Computer Engineering and Systems, ICCES 2015
CountryEgypt
CityCairo
Period23/12/1524/12/15

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    Asif, S., & Kong, Y. (2015). Design of an algorithmic Wallace multiplier using high speed counters. In W. G. A. Abdelaal, M. W. El-Kharashi, A. M. B. El-Din, M. Taher, & A. M. Zaki (Eds.), Proceedings - 2015 10th International Conference on Computer Engineering and Systems, ICCES 2015 (pp. 133-138). [7393033] Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ICCES.2015.7393033