Design of an oscillator with low phase noise and medium output power in a 0.25 μm GaN-on-SiC high electron-mobility transistors technology

Hang Liu*, Xi Zhu, Chirn Chye Boon, Xiang Yi

*Corresponding author for this work

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

To investigate the effects of both the drain and gate bias voltages on the performance of GaN high electronmobility transistors (HEMT) oscillator, a 0.25 μm GaN-on-SiC HEMT oscillator is presented in this study. Utilising the designed oscillator, the trade-off between phase noise and output power is effectively investigated at the circuit level. As a result, the designed oscillator can provide low phase noise and medium output power simultaneously. The phase noise at VGS = -2.3 V and VDS = 3.3 V is measured to be -112 dBc/Hz and -143 dBc/Hz at 100 kHz offset and 1 MHz offset, respectively, from a 4.954 GHz carrier, with an output power of more than 14 dBm. Moreover, the output power can be boosted to 26 dBm, if a drain bias 16 V is used, while good phase noise of -132 dBc/Hz @ 1 MHz is still achievable. The achieved phase noise is low among all reported GaN HEMT oscillators. This work has successfully demonstrated that the monolithic oscillator fabricated in GaN-on-SiC HEMT technology features low phase noise as well as medium output power simultaneously.

Original languageEnglish
Pages (from-to)795-801
Number of pages7
JournalIET Microwaves, Antennas and Propagation
Volume9
Issue number8
DOIs
Publication statusPublished - 5 Jun 2015

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