Design of low power, high PSRR low drop-out voltage regulator

Meriam Gay Bautista, Qadier Idris Jilluh, Michael Heimlich, Eryk Dutkiewicz, Jeffrey Pasco

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review

2 Citations (Scopus)

Abstract

This paper presents a low power, low drop-out (LDO) voltage regulator, designed and implemented using 0.18 micron CMOS process. With a supply voltage of 1.8V, 50mA current and with a single compensation capacitor of 1pF. A constant transconductance current reference is used as a bias circuit for the Error Amplifier. The maximum output load current is 50mA at a regulated output voltage of 1.68V.The voltage regulator delivers a full load transient response of 5.5mV overshoot and 3.4mV undershoot. Furthermore, the LDO PSRR rating is -73dB @ 16.7MHz, and a relatively low power of 90mW.

Original languageEnglish
Title of host publication8th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2015
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages1-5
Number of pages5
ISBN (Electronic)9781509003594
DOIs
Publication statusPublished - 2015
Event8th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2015 - Cebu, Philippines
Duration: 9 Dec 201512 Dec 2015

Other

Other8th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2015
CountryPhilippines
CityCebu
Period9/12/1512/12/15

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