Development and verification of a scalable GaAs pHEMT FEM thermal model

Bryan K. Schwitter*, Anthony P. Fattorini, Simon J. Mahon, Anthony E. Parker, Michael C. Heimlich

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review

Abstract

An accurate scalable 3-D thermal finite-element-method (FEM) model is developed and verified for a GaAs pHEMT process using gate resistance thermometry (GRT) as the basis. The measurement technique is suited to scalable model development, since the gate metal is in intimate proximity to the heat source in the device channel. The FEM model is demonstrated to scale with channel power dissipation and gate periphery, simultaneously. Agreement to within 6% of all measured configurations/operating conditions is demonstrated. The model is suitable for inclusion in semiconductor foundry design kits to determine thermal resistance values for nonlinear device models, and also for thermal analyses of power amplifier layouts.

Original languageEnglish
Title of host publication2016 11th European microwave integrated circuits conference (EUMIC)
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages249-252
Number of pages4
ISBN (Electronic)9782874870446
DOIs
Publication statusPublished - 7 Dec 2016
Event11th European Microwave Integrated Circuits Conference (EuMIC) - London, United Kingdom
Duration: 3 Oct 20164 Oct 2016

Publication series

NameEuropean Microwave Integrated Circuits Conference - Proceedings
PublisherIEEE

Conference

Conference11th European Microwave Integrated Circuits Conference (EuMIC)
CountryUnited Kingdom
CityLondon
Period3/10/164/10/16

Keywords

  • Gallium arsenide
  • HEMTs
  • MMICs
  • temperature measurement
  • thermal analysis
  • GATE JUNCTION TEMPERATURE
  • BIAS

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