Abstract
We present an analysis of a 4-FET Transconductor at medium frequencies, using a more realistic GaAs MESFET model, to calculate optimum device widths to minimize 2nd order distortion. Provisional analytical results are compared with SPICE simulations using the Parker Skellern model. A multi-FET Frequency Doubler is similarly analyzed to calculate optimum device widths for high fundamental rejection and optimum load for 3rd order distortion nulling. The high frequency degradation of the 4-FET Transconductor is discussed. Simulated performance of two high frequency distortion compensated Linearized Isolator designs, together with a variation of the Frequency Doubler, show good performance at high frequencies.
| Original language | English |
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| Pages (from-to) | 189-192 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 5 |
| Publication status | Published - 1994 |
| Externally published | Yes |