Efficient low-power design and implementation of iq-imbalance compensator using early termination

Ediz Cetin*, Izzet Kale, Richard C S Morling

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contribution

2 Citations (Scopus)

Abstract

In this paper, we propose a low-complexity architecture for the implementation of adaptive IQ-imbalance compensation in quadrature zero-IF receivers. Our blind IQ-compensation scheme jointly compensates for IQ phase and gain errors without the need for test/pilot tones. The proposed architecture employs early-termination of the iteration process; this enables the powering-down of the parts of the adaptive algorithm thereby saving power. The complexity, in terms of power-down efficiency is evaluated and shows a reduction by 37-50% for 32-PSK and 37-58% for 64-QAM modulated signals.

Original languageEnglish
Title of host publicationISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings
Place of PublicationPiscataway, New Jersey
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages4995-4998
Number of pages4
ISBN (Print)0780393902, 9780780393905
Publication statusPublished - 2006
EventISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
Duration: 21 May 200624 May 2006

Other

OtherISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
CountryGreece
CityKos
Period21/05/0624/05/06

Fingerprint Dive into the research topics of 'Efficient low-power design and implementation of iq-imbalance compensator using early termination'. Together they form a unique fingerprint.

  • Cite this

    Cetin, E., Kale, I., & Morling, R. C. S. (2006). Efficient low-power design and implementation of iq-imbalance compensator using early termination. In ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings (pp. 4995-4998). [1693753] Piscataway, New Jersey: Institute of Electrical and Electronics Engineers (IEEE).