FPGA-based efficient modular multiplication for elliptic curve cryptography

Modular multiplication is the backbone for the whole asymmetric cryptographic process. In this paper, we have focused on a high-speed hardware implementation of modular multiplication for public-key cryptography, specially for a high-performance Elliptic Curve Crypto-processor (ECC). The proposed design has been implemented over a prime finite field of size p using the National Institute of Standards and Technology (NIST) recommended standards. Field-Programmable Gate-Array (FPGA) technology with the VHDL language has been used for this hardware implementation. The computational time of a 256-bit modular multiplication in a modern Xilinx Virtex-7 FPGA is 1.683 μs at frequency 152.709 MHz; in this technology we have implemented an area-efficient hardware design technique which takes only 605 slices for a 256-bit modular multiplication. The required area and time are also very low compared with all other recent designs. The product of area and time (AT) of our design is also nearly 9-98 times better than the related designs. To our knowledge, our implemented modular multiplication over GF(p) provides a better performance than the recent hardware implementations.