FPGA implementation of modular multiplier in residue number system

Yinan Kong; Md Selim Hossain

doi:10.1109/IOTAIS.2018.8600881

FPGA implementation of modular multiplier in residue number system

Yinan Kong, Md Selim Hossain

School of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

4 Citations (Scopus)

Abstract

This work presents a description of a highperformance hardware implementation of a Montgomery modular multiplier using a residue number system (RNS). An RNS can be considered as self-defense against simple power analysis (SPA) and differential power analysis (DPA) attacks, and can be used for public-key cryptography, such as the Rivest, Shamir and Adleman (RSA) cryptosystem and elliptic curve cryptosystems (ECC). Various kinds of security are required for Big Data analysis. The proposed RNS-based modular multiplier is suitable for public-key cryptography that can be used for Big Data security. It is implemented on field-programmable gate-array (FPGA) technology and optimized by trying different variants of the Montgomery Algorithm on it. The proposed RNS-based modular multiplication takes only 22 ns on the Xilinx Virtex-II FPGA. In addition, it needs relatively few resources on the FPGA, needing only 68 slices.

Original language	English
Title of host publication	Proceedings
Subtitle of host publication	The 2018 IEEE International Conference on Internet of Things and Intelligence
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	137-140
Number of pages	4
ISBN (Electronic)	9781538673584, 9781538673577
ISBN (Print)	9781538673591
DOIs	https://doi.org/10.1109/IOTAIS.2018.8600881
Publication status	Published - 2018
Event	2018 IEEE International Conference on Internet of Things and Intelligence System, IOTAIS 2018 - Bali, Indonesia Duration: 1 Nov 2018 → 3 Nov 2018

Conference

Conference	2018 IEEE International Conference on Internet of Things and Intelligence System, IOTAIS 2018
Country/Territory	Indonesia
City	Bali
Period	1/11/18 → 3/11/18

Keywords

Montgomery modular multiplier
residue number system (RNS)
field-programmable gate array (FPGA)
high performance
public-key cryptography
Big Data

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10.1109/IOTAIS.2018.8600881

Cite this

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title = "FPGA implementation of modular multiplier in residue number system",

abstract = "This work presents a description of a highperformance hardware implementation of a Montgomery modular multiplier using a residue number system (RNS). An RNS can be considered as self-defense against simple power analysis (SPA) and differential power analysis (DPA) attacks, and can be used for public-key cryptography, such as the Rivest, Shamir and Adleman (RSA) cryptosystem and elliptic curve cryptosystems (ECC). Various kinds of security are required for Big Data analysis. The proposed RNS-based modular multiplier is suitable for public-key cryptography that can be used for Big Data security. It is implemented on field-programmable gate-array (FPGA) technology and optimized by trying different variants of the Montgomery Algorithm on it. The proposed RNS-based modular multiplication takes only 22 ns on the Xilinx Virtex-II FPGA. In addition, it needs relatively few resources on the FPGA, needing only 68 slices.",

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author = "Yinan Kong and Hossain, {Md Selim}",

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Kong, Y & Hossain, MS 2018, FPGA implementation of modular multiplier in residue number system. in Proceedings: The 2018 IEEE International Conference on Internet of Things and Intelligence. Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, pp. 137-140, 2018 IEEE International Conference on Internet of Things and Intelligence System, IOTAIS 2018, Bali, Indonesia, 1/11/18. https://doi.org/10.1109/IOTAIS.2018.8600881

FPGA implementation of modular multiplier in residue number system. / Kong, Yinan; Hossain, Md Selim.

Proceedings: The 2018 IEEE International Conference on Internet of Things and Intelligence. Piscataway, NJ : Institute of Electrical and Electronics Engineers (IEEE), 2018. p. 137-140.

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

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AU - Hossain, Md Selim

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AB - This work presents a description of a highperformance hardware implementation of a Montgomery modular multiplier using a residue number system (RNS). An RNS can be considered as self-defense against simple power analysis (SPA) and differential power analysis (DPA) attacks, and can be used for public-key cryptography, such as the Rivest, Shamir and Adleman (RSA) cryptosystem and elliptic curve cryptosystems (ECC). Various kinds of security are required for Big Data analysis. The proposed RNS-based modular multiplier is suitable for public-key cryptography that can be used for Big Data security. It is implemented on field-programmable gate-array (FPGA) technology and optimized by trying different variants of the Montgomery Algorithm on it. The proposed RNS-based modular multiplication takes only 22 ns on the Xilinx Virtex-II FPGA. In addition, it needs relatively few resources on the FPGA, needing only 68 slices.

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KW - residue number system (RNS)

KW - field-programmable gate array (FPGA)

KW - high performance

KW - public-key cryptography

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ER -

FPGA implementation of modular multiplier in residue number system

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