Abstract
Chronolog is an extension of logic programming based on temporal logic. The paper presents a framework which can be used to exploit multiple levels of parallelism found in Chronolog programs, context parallelism, AND- and OR-parallelism. Based on an analysis of these modes of parallelism in Chronolog programs occurs when more than one child-computation are active at a time, and it is exploited through dynamic tagging approach typically used in dataflow computers. At the level of clause arguments, we introduce an intermediate virtual machine (CVM), which is granulated to exploit the argument parallelism through temporal unification. We also give the details of the CVM instruction set. The model is process-based and supports AND-, OR-parallelism in the highly distributed dataflow environment.
Original language | English |
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Title of host publication | IEEE International Conference on Algorithms and Architectures for Parallel Processing |
Place of Publication | Piscataway, NJ |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 163-172 |
Number of pages | 10 |
Volume | 1 |
DOIs | |
Publication status | Published - 1995 |
Event | Proceedings of the IEEE 1st International Conference on Algorithms and Architectures for Parallel Processing. Part 1 (of 2) - Brisbane, Aust Duration: 19 Apr 1995 → 21 Apr 1995 |
Other
Other | Proceedings of the IEEE 1st International Conference on Algorithms and Architectures for Parallel Processing. Part 1 (of 2) |
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City | Brisbane, Aust |
Period | 19/04/95 → 21/04/95 |