Abstract
Elliptic curve cryptography (ECC) plays a vital role in pabing secure information among different wireleb devices. This paper presents a fast, high-performance hardware implementation of an ECC procebor over binary field GF(2m) using a polynomial basis. A high-performance elliptic curve point multiplier (ECPM) is designed using an efficient finite-field arithmetic unit in affine coordinates, where ECPM is the key operation of an ECC procebor. It has been implemented using the National Institute of Standards and Technology (NIST) recommended curves over the field GF(2163). The proposed design is synthesized in field-programmable gate array (FPGA) technology with the VHDL. The delay of ECPM in a modern Xilinx Kintex-7 (28-nm) technology is 1.06 ms at 306.48 MHz. The proposed ECC procebor takes a small amount of resources on the FPGA and needs only 2253 slices without using any DSP slices. The proposed design provides nearly 50% better delay performance than recent implementations.
| Original language | English |
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| Title of host publication | ICISSP 2016 - Proceedings of the 2nd International Conference on Information Systems Security and Privacy |
| Place of Publication | Rome, Italy |
| Publisher | SciTePress |
| Pages | 415-422 |
| Number of pages | 8 |
| ISBN (Electronic) | 9789897581670 |
| Publication status | Published - 2016 |
| Event | 2nd International Conference on Information Systems Security and Privacy, ICISSP 2016 - Rome, Italy Duration: 19 Feb 2016 → 21 Feb 2016 |
Other
| Other | 2nd International Conference on Information Systems Security and Privacy, ICISSP 2016 |
|---|---|
| Country/Territory | Italy |
| City | Rome |
| Period | 19/02/16 → 21/02/16 |
Keywords
- Elliptic Curve Cryptography (ECC)
- Elliptic Curve Point Multiplication (ECPM)
- Field-programmable Gate Array (FPGA)
- Finite/Galois Field Arithmetic