High performance SOI and bulk CMOS 5GHz VCOs

Tae Youn Kim*, Andrew Adams, Neil Weste

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review

16 Citations (Scopus)


This paper presents a comparison of two 5GHz VCOs. One is implemented in an SOI process and the other in a conventional bulk CMOS process. The SOI design presents the lowest reported power (1.65mW, -110dBc/Hz@1MHz) in a 5GHz VCO, while the bulk device presents the lowest phase noise achieved in a 5GHz VCO (17.25mW, - 126dBc/Hz@1MHz). The design tradeoffs are discussed.

Original languageEnglish
Title of host publicationIEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003
EditorsTina Quach
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages4
ISBN (Electronic)0780372409
ISBN (Print)0780376943
Publication statusPublished - Jun 2003
Externally publishedYes
Event2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Philadelphia, PA, United States
Duration: 8 Jun 200310 Jun 2003


Other2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Country/TerritoryUnited States
CityPhiladelphia, PA


Dive into the research topics of 'High performance SOI and bulk CMOS 5GHz VCOs'. Together they form a unique fingerprint.

Cite this