Abstract
This paper presents a comparison of two 5GHz VCOs. One is implemented in an SOI process and the other in a conventional bulk CMOS process. The SOI design presents the lowest reported power (1.65mW, -110dBc/Hz@1MHz) in a 5GHz VCO, while the bulk device presents the lowest phase noise achieved in a 5GHz VCO (17.25mW, - 126dBc/Hz@1MHz). The design tradeoffs are discussed.
Original language | English |
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Title of host publication | IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 |
Editors | Tina Quach |
Place of Publication | Piscataway, NJ |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 93-96 |
Number of pages | 4 |
ISBN (Electronic) | 0780372409 |
ISBN (Print) | 0780376943 |
DOIs | |
Publication status | Published - Jun 2003 |
Externally published | Yes |
Event | 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Philadelphia, PA, United States Duration: 8 Jun 2003 → 10 Jun 2003 |
Other
Other | 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium |
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Country/Territory | United States |
City | Philadelphia, PA |
Period | 8/06/03 → 10/06/03 |