High performance SOI and bulk CMOS 5GHz VCOs

Tae Youn Kim; Andrew Adams; Neil Weste

doi:10.1109/RFIC.2003.1213901

High performance SOI and bulk CMOS 5GHz VCOs

Tae Youn Kim^*, Andrew Adams, Neil Weste

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

16 Citations (Scopus)

Abstract

This paper presents a comparison of two 5GHz VCOs. One is implemented in an SOI process and the other in a conventional bulk CMOS process. The SOI design presents the lowest reported power (1.65mW, -110dBc/Hz@1MHz) in a 5GHz VCO, while the bulk device presents the lowest phase noise achieved in a 5GHz VCO (17.25mW, - 126dBc/Hz@1MHz). The design tradeoffs are discussed.

Original language	English
Title of host publication	IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003
Editors	Tina Quach
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	93-96
Number of pages	4
ISBN (Electronic)	0780372409
ISBN (Print)	0780376943
DOIs	https://doi.org/10.1109/RFIC.2003.1213901
Publication status	Published - Jun 2003
Externally published	Yes
Event	2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Philadelphia, PA, United States Duration: 8 Jun 2003 → 10 Jun 2003

Other

Other	2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Country/Territory	United States
City	Philadelphia, PA
Period	8/06/03 → 10/06/03

Access to Document

10.1109/RFIC.2003.1213901

Cite this

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title = "High performance SOI and bulk CMOS 5GHz VCOs",

abstract = "This paper presents a comparison of two 5GHz VCOs. One is implemented in an SOI process and the other in a conventional bulk CMOS process. The SOI design presents the lowest reported power (1.65mW, -110dBc/Hz@1MHz) in a 5GHz VCO, while the bulk device presents the lowest phase noise achieved in a 5GHz VCO (17.25mW, - 126dBc/Hz@1MHz). The design tradeoffs are discussed.",

author = "Kim, {Tae Youn} and Andrew Adams and Neil Weste",

year = "2003",

month = jun,

doi = "10.1109/RFIC.2003.1213901",

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editor = "Tina Quach",

booktitle = "IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

note = "2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium ; Conference date: 08-06-2003 Through 10-06-2003",

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Kim, TY, Adams, A & Weste, N 2003, High performance SOI and bulk CMOS 5GHz VCOs. in T Quach (ed.), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003. Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, pp. 93-96, 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Philadelphia, PA, United States, 8/06/03. https://doi.org/10.1109/RFIC.2003.1213901

High performance SOI and bulk CMOS 5GHz VCOs. / Kim, Tae Youn; Adams, Andrew; Weste, Neil.
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003. ed. / Tina Quach. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE), 2003. p. 93-96.

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

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AU - Adams, Andrew

AU - Weste, Neil

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AB - This paper presents a comparison of two 5GHz VCOs. One is implemented in an SOI process and the other in a conventional bulk CMOS process. The SOI design presents the lowest reported power (1.65mW, -110dBc/Hz@1MHz) in a 5GHz VCO, while the bulk device presents the lowest phase noise achieved in a 5GHz VCO (17.25mW, - 126dBc/Hz@1MHz). The design tradeoffs are discussed.

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DO - 10.1109/RFIC.2003.1213901

M3 - Conference proceeding contribution

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BT - IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003

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PB - Institute of Electrical and Electronics Engineers (IEEE)

CY - Piscataway, NJ

T2 - 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium

Y2 - 8 June 2003 through 10 June 2003

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High performance SOI and bulk CMOS 5GHz VCOs

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