High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields

Md Selim Hossain; Ehsan Saeedi; Yinan Kong

doi:10.1109/DSDIS.2015.44

High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields

Md Selim Hossain, Ehsan Saeedi, Yinan Kong

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

15 Citations (Scopus)

Abstract

In this paper we propose a high-performance FPGA-based implementation of an elliptic curve cryptographic (ECC) processor over binary field GF(2^m) for modern cryptographic applications. A high-speed elliptic curve scalar multiplier (ECSM) is designed using an efficient finite-field arithmetic unit, where ECSM is the main operation of an ECC processor. It has been implemented in an affine coordinate system using a polynomial basis. The implemented design is synthesized in field-programmable gate array (FPGA) technology. The ECSM time in a modern Xilinx Kintex-7 FPGA is 2.66 ms at 255.66 MHz and 5.54 ms at 251.98 MHz for the field size of GF(2²³³) and GF(2²⁸³) respectively. Simulation results show that the implemented design is area-efficient, as it contains only 3016 slices for the field F2233 and 4625 slices for the field F2283. To the best of the authors' knowledge, the proposed ECC processor shows better performance than the available hardware implementations.

Original language	English
Title of host publication	Proceedings
Subtitle of host publication	2015 IEEE international conference on data science and data intensive systems; the eighth IEEE international conference cyber, physical and social computing; the eleventh IEEE international conference on green computing and communications and the eighth IEEE international conference on internet of things
Editors	Jinjun Chen, Laurence T. Yang
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	175-181
Number of pages	7
ISBN (Electronic)	9781509002146
DOIs	https://doi.org/10.1109/DSDIS.2015.44
Publication status	Published - 2015
Event	2015 IEEE International Conference on Data Science and Data Intensive Systems; 8th IEEE International Conference Cyber, Physical and Social Computing; 11th IEEE International Conference on Green Computing and Communications and 8th IEEE International Conference on Internet of Things, DSDIS/CPSCom/GreenCom/iThings 2015 - Sydney, Australia Duration: 11 Dec 2015 → 13 Dec 2015

Other

Other	2015 IEEE International Conference on Data Science and Data Intensive Systems; 8th IEEE International Conference Cyber, Physical and Social Computing; 11th IEEE International Conference on Green Computing and Communications and 8th IEEE International Conference on Internet of Things, DSDIS/CPSCom/GreenCom/iThings 2015
Country/Territory	Australia
City	Sydney
Period	11/12/15 → 13/12/15

Keywords

Elliptic curve cryptography (ECC)
elliptic curve scalar multiplication (ECSM)
field-programmable gate-array (FPGA)
finite-field arithmetic (FFA)
National Institute of Standards and Technology (NIST)
public-key cryptography (PKC)

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10.1109/DSDIS.2015.44

Cite this

Hossain, M. S., Saeedi, E., & Kong, Y. (2015). High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields. In J. Chen, & L. T. Yang (Eds.), Proceedings: 2015 IEEE international conference on data science and data intensive systems; the eighth IEEE international conference cyber, physical and social computing; the eleventh IEEE international conference on green computing and communications and the eighth IEEE international conference on internet of things (pp. 175-181). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/DSDIS.2015.44

Hossain, Md Selim ; Saeedi, Ehsan ; Kong, Yinan. / High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields. Proceedings: 2015 IEEE international conference on data science and data intensive systems; the eighth IEEE international conference cyber, physical and social computing; the eleventh IEEE international conference on green computing and communications and the eighth IEEE international conference on internet of things. editor / Jinjun Chen ; Laurence T. Yang. Piscataway, NJ : Institute of Electrical and Electronics Engineers (IEEE), 2015. pp. 175-181

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title = "High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields",

abstract = "In this paper we propose a high-performance FPGA-based implementation of an elliptic curve cryptographic (ECC) processor over binary field GF(2m) for modern cryptographic applications. A high-speed elliptic curve scalar multiplier (ECSM) is designed using an efficient finite-field arithmetic unit, where ECSM is the main operation of an ECC processor. It has been implemented in an affine coordinate system using a polynomial basis. The implemented design is synthesized in field-programmable gate array (FPGA) technology. The ECSM time in a modern Xilinx Kintex-7 FPGA is 2.66 ms at 255.66 MHz and 5.54 ms at 251.98 MHz for the field size of GF(2233) and GF(2283) respectively. Simulation results show that the implemented design is area-efficient, as it contains only 3016 slices for the field F2233 and 4625 slices for the field F2283. To the best of the authors' knowledge, the proposed ECC processor shows better performance than the available hardware implementations.",

keywords = "Elliptic curve cryptography (ECC), elliptic curve scalar multiplication (ECSM), field-programmable gate-array (FPGA), finite-field arithmetic (FFA), National Institute of Standards and Technology (NIST), public-key cryptography (PKC)",

author = "Hossain, {Md Selim} and Ehsan Saeedi and Yinan Kong",

year = "2015",

doi = "10.1109/DSDIS.2015.44",

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Hossain, MS, Saeedi, E & Kong, Y 2015, High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields. in J Chen & LT Yang (eds), Proceedings: 2015 IEEE international conference on data science and data intensive systems; the eighth IEEE international conference cyber, physical and social computing; the eleventh IEEE international conference on green computing and communications and the eighth IEEE international conference on internet of things. Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, pp. 175-181, 2015 IEEE International Conference on Data Science and Data Intensive Systems; 8th IEEE International Conference Cyber, Physical and Social Computing; 11th IEEE International Conference on Green Computing and Communications and 8th IEEE International Conference on Internet of Things, DSDIS/CPSCom/GreenCom/iThings 2015, Sydney, Australia, 11/12/15. https://doi.org/10.1109/DSDIS.2015.44

High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields. / Hossain, Md Selim; Saeedi, Ehsan; Kong, Yinan.
Proceedings: 2015 IEEE international conference on data science and data intensive systems; the eighth IEEE international conference cyber, physical and social computing; the eleventh IEEE international conference on green computing and communications and the eighth IEEE international conference on internet of things. ed. / Jinjun Chen; Laurence T. Yang. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE), 2015. p. 175-181.

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

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N2 - In this paper we propose a high-performance FPGA-based implementation of an elliptic curve cryptographic (ECC) processor over binary field GF(2m) for modern cryptographic applications. A high-speed elliptic curve scalar multiplier (ECSM) is designed using an efficient finite-field arithmetic unit, where ECSM is the main operation of an ECC processor. It has been implemented in an affine coordinate system using a polynomial basis. The implemented design is synthesized in field-programmable gate array (FPGA) technology. The ECSM time in a modern Xilinx Kintex-7 FPGA is 2.66 ms at 255.66 MHz and 5.54 ms at 251.98 MHz for the field size of GF(2233) and GF(2283) respectively. Simulation results show that the implemented design is area-efficient, as it contains only 3016 slices for the field F2233 and 4625 slices for the field F2283. To the best of the authors' knowledge, the proposed ECC processor shows better performance than the available hardware implementations.

AB - In this paper we propose a high-performance FPGA-based implementation of an elliptic curve cryptographic (ECC) processor over binary field GF(2m) for modern cryptographic applications. A high-speed elliptic curve scalar multiplier (ECSM) is designed using an efficient finite-field arithmetic unit, where ECSM is the main operation of an ECC processor. It has been implemented in an affine coordinate system using a polynomial basis. The implemented design is synthesized in field-programmable gate array (FPGA) technology. The ECSM time in a modern Xilinx Kintex-7 FPGA is 2.66 ms at 255.66 MHz and 5.54 ms at 251.98 MHz for the field size of GF(2233) and GF(2283) respectively. Simulation results show that the implemented design is area-efficient, as it contains only 3016 slices for the field F2233 and 4625 slices for the field F2283. To the best of the authors' knowledge, the proposed ECC processor shows better performance than the available hardware implementations.

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KW - finite-field arithmetic (FFA)

KW - National Institute of Standards and Technology (NIST)

KW - public-key cryptography (PKC)

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Hossain MS, Saeedi E, Kong Y. High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields. In Chen J, Yang LT, editors, Proceedings: 2015 IEEE international conference on data science and data intensive systems; the eighth IEEE international conference cyber, physical and social computing; the eleventh IEEE international conference on green computing and communications and the eighth IEEE international conference on internet of things. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE). 2015. p. 175-181 doi: 10.1109/DSDIS.2015.44

High-Speed, Area-Efficient, FPGA-Based Elliptic Curve Cryptographic Processor over NIST Binary Fields

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