TY - JOUR
T1 - High speed array computer for dynamic time warping
AU - Burr, D. J.
AU - Ackland, Bryan
AU - Weste, Neil
PY - 1981
Y1 - 1981
N2 - A CMOS integrated array processor for computing the dynamic time warp algorithm is described. It allows many popular variations including LPC and frequency domain representations of speech. High speed is obtained by extensive pipelining, parallel computation, and simultaneous matching of multiple patterns. A realistic application using 40 nine-component LPC vectors per word permits 10,000 word comparisons per second or, equivalently, real time recognition of a 10,000 word vocabulary.
AB - A CMOS integrated array processor for computing the dynamic time warp algorithm is described. It allows many popular variations including LPC and frequency domain representations of speech. High speed is obtained by extensive pipelining, parallel computation, and simultaneous matching of multiple patterns. A realistic application using 40 nine-component LPC vectors per word permits 10,000 word comparisons per second or, equivalently, real time recognition of a 10,000 word vocabulary.
UR - http://www.scopus.com/inward/record.url?scp=0019661509&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0019661509
SN - 0736-7791
VL - 2
SP - 471
EP - 474
JO - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
JF - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
ER -