The work presents the architecture and some of the algorithms used in an advanced color display station for IC design. The display architecture is based on a high-speed microprogrammable bit-slice microprocessor which is optimized for the algorithms found in raster-scan graphics. A new algorithm for area filling is presented which is optimized for firmware implementation. The performance of the display in an I. C. design environment is described as an example of integration into a complete design station. A unique feature of the display system is the ability to pan, in real time, over a hierarchical data base.