Lateral SiGe heterojunction bipolar transistor by confined selective epitaxial growth

simulation and material growth

P. Pengpad*, K. Osman, N. S. Lloyd, J. M. Bonar, P. Ashburn, H. A. Kemhadjian, J. S. Hamel, D. M. Bagnall

*Corresponding author for this work

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

A new design for a lateral SiGe HBT has been based on development studies of confined lateral selective epitaxial growth in cavities built into silicon-on-insulator wafers. A design process is described and modelled. Device simulations indicate devices with maximum fT of 22 GHz with peak gain of 95 and fmax of 14 GHz can be obtained by the processes outlined. The simulation results highlight the feasibility of the design and further improvements and scaling of the device would allow the transistor to operate at even higher frequencies and lower power.

Original languageEnglish
Pages (from-to)508-513
Number of pages6
JournalMicroelectronic Engineering
Volume73-74
DOIs
Publication statusPublished - Jun 2004
Externally publishedYes

Keywords

  • confined lateral selective epitaxial growth
  • heterojunction bipolar transistor
  • SiGe
  • SiGe HBT device simulation
  • SiGe HBT process simulation

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