Abstract
This work contributes to the modular multiplication operation C = A × B, the basis of many public-key cryptosystems including RSA and Elliptic Curve Cryptography (ECC). We use the Residue Number System (RNS) to speed up long wordlength modular multiplication. The RNS leads to a highly parallel algorithm which we exploit with a massively parallel hardware implementation capable of exceptionally low latency. This paper presents architecture for this scheme consisting of a scalable array of identical processing elements.
Original language | English |
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Title of host publication | 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013 |
Place of Publication | Piscataway, NJ |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 1039-1042 |
Number of pages | 4 |
ISBN (Electronic) | 9781479900664, 9781479900640 |
ISBN (Print) | 9781479900657 |
DOIs | |
Publication status | Published - 2 Dec 2013 |
Event | 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013 - Columbus, OH, United States Duration: 4 Aug 2013 → 7 Aug 2013 |
Other
Other | 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013 |
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Country/Territory | United States |
City | Columbus, OH |
Period | 4/08/13 → 7/08/13 |