Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model

Chetan Gupta; Harshit Agarwal; Yogesh S. Chauhan; Sourabh Khandelwal; Yen Kai Lin; Chenming Hu; Renaud Gillon

doi:10.1109/EDSSC.2016.7785225

Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model

Chetan Gupta, Harshit Agarwal, Yogesh S. Chauhan, Sourabh Khandelwal, Yen Kai Lin, Chenming Hu, Renaud Gillon

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution

5 Citations (Scopus)

Abstract

In this paper we have shown the modeling of Lateral Double-Diffused MOS (LDMOS) transistor. A LDMOS structure can be divided into two parts, intrinsic channel and extended drift region. The intinsic channel region is modeled by industry standard BSIM6 model and extended drift region has been modeled by the modified CMC standard model of R3. The R3 model of non-linear resistor, which includes physical effects like velocity-saturation, self-heating etc. has been modified to include gate bias dependency. The new model has been validated with technology computer-aided design (TCAD) simulations and measured data from ON Semiconductor. The model (which is the combination of BSIM6 and R3 models) shows excellent agreement with the TCAD simulations and measured data.

Original language	English
Title of host publication	EDSSC 2016
Subtitle of host publication	IEEE International Conference on Electron Devices and Solid-State Circuits : proceedings
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	124-127
Number of pages	4
ISBN (Electronic)	9781509018307
DOIs	https://doi.org/10.1109/EDSSC.2016.7785225
Publication status	Published - 15 Dec 2016
Externally published	Yes
Event	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 - Hong Kong, Hong Kong Duration: 3 Aug 2016 → 5 Aug 2016

Other

Other	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
Country/Territory	Hong Kong
City	Hong Kong
Period	3/08/16 → 5/08/16

Keywords

BSIM6
LDMOS
quasi-saturation
R3
Self-Heating Effect

Access to Document

10.1109/EDSSC.2016.7785225

Cite this

Gupta, C., Agarwal, H., Chauhan, Y. S., Khandelwal, S., Lin, Y. K., Hu, C., & Gillon, R. (2016). Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model. In EDSSC 2016: IEEE International Conference on Electron Devices and Solid-State Circuits : proceedings (pp. 124-127). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/EDSSC.2016.7785225

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title = "Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model",

abstract = "In this paper we have shown the modeling of Lateral Double-Diffused MOS (LDMOS) transistor. A LDMOS structure can be divided into two parts, intrinsic channel and extended drift region. The intinsic channel region is modeled by industry standard BSIM6 model and extended drift region has been modeled by the modified CMC standard model of R3. The R3 model of non-linear resistor, which includes physical effects like velocity-saturation, self-heating etc. has been modified to include gate bias dependency. The new model has been validated with technology computer-aided design (TCAD) simulations and measured data from ON Semiconductor. The model (which is the combination of BSIM6 and R3 models) shows excellent agreement with the TCAD simulations and measured data.",

keywords = "BSIM6, LDMOS, quasi-saturation, R3, Self-Heating Effect",

author = "Chetan Gupta and Harshit Agarwal and Chauhan, {Yogesh S.} and Sourabh Khandelwal and Lin, {Yen Kai} and Chenming Hu and Renaud Gillon",

year = "2016",

month = dec,

day = "15",

doi = "10.1109/EDSSC.2016.7785225",

language = "English",

pages = "124--127",

booktitle = "EDSSC 2016",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

note = "2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 ; Conference date: 03-08-2016 Through 05-08-2016",

}

Gupta, C, Agarwal, H, Chauhan, YS, Khandelwal, S, Lin, YK, Hu, C & Gillon, R 2016, Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model. in EDSSC 2016: IEEE International Conference on Electron Devices and Solid-State Circuits : proceedings. Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, pp. 124-127, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016, Hong Kong, Hong Kong, 3/08/16. https://doi.org/10.1109/EDSSC.2016.7785225

Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model. / Gupta, Chetan; Agarwal, Harshit; Chauhan, Yogesh S. et al.

EDSSC 2016: IEEE International Conference on Electron Devices and Solid-State Circuits : proceedings. Piscataway, NJ : Institute of Electrical and Electronics Engineers (IEEE), 2016. p. 124-127.

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution

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T1 - Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model

AU - Gupta, Chetan

AU - Agarwal, Harshit

AU - Chauhan, Yogesh S.

AU - Khandelwal, Sourabh

AU - Lin, Yen Kai

AU - Hu, Chenming

AU - Gillon, Renaud

PY - 2016/12/15

Y1 - 2016/12/15

N2 - In this paper we have shown the modeling of Lateral Double-Diffused MOS (LDMOS) transistor. A LDMOS structure can be divided into two parts, intrinsic channel and extended drift region. The intinsic channel region is modeled by industry standard BSIM6 model and extended drift region has been modeled by the modified CMC standard model of R3. The R3 model of non-linear resistor, which includes physical effects like velocity-saturation, self-heating etc. has been modified to include gate bias dependency. The new model has been validated with technology computer-aided design (TCAD) simulations and measured data from ON Semiconductor. The model (which is the combination of BSIM6 and R3 models) shows excellent agreement with the TCAD simulations and measured data.

AB - In this paper we have shown the modeling of Lateral Double-Diffused MOS (LDMOS) transistor. A LDMOS structure can be divided into two parts, intrinsic channel and extended drift region. The intinsic channel region is modeled by industry standard BSIM6 model and extended drift region has been modeled by the modified CMC standard model of R3. The R3 model of non-linear resistor, which includes physical effects like velocity-saturation, self-heating etc. has been modified to include gate bias dependency. The new model has been validated with technology computer-aided design (TCAD) simulations and measured data from ON Semiconductor. The model (which is the combination of BSIM6 and R3 models) shows excellent agreement with the TCAD simulations and measured data.

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KW - quasi-saturation

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KW - Self-Heating Effect

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BT - EDSSC 2016

PB - Institute of Electrical and Electronics Engineers (IEEE)

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ER -

Gupta C, Agarwal H, Chauhan YS, Khandelwal S, Lin YK, Hu C et al. Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model. In EDSSC 2016: IEEE International Conference on Electron Devices and Solid-State Circuits : proceedings. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE). 2016. p. 124-127 https://doi.org/10.1109/EDSSC.2016.7785225

Modeling of high voltage LDMOSFET using industry standard BSIM6 MOS model

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