Modeling of Subsurface Leakage Current in Low V-TH Short Channel MOSFET at Accumulation Bias

Yen Kai Lin, Sourabh Khandelwal, Aditya Sankar Medury, Harshit Agarwal, Huan Lin Chang, Yogesh Singh Chauhan, Chenming Hu

Research output: Contribution to journalArticlepeer-review

9 Citations (Scopus)

Abstract

We present a phenomenological model for subsurface leakage current in MOSFETs biased in accumulation. The subsurface leakage current is mainly caused by source-drain coupling, leading to carriers surmounting the barrier between the source and the drain. The developed model successfully takes drain-to-source voltage (VDS), gate-to-source voltage ( VGS), gate length ( LG), substrate doping concentration ( Nsub), and temperature ( $T$ ) dependence into account. The presented analytical model is implemented into the BSIM6 bulk MOSFET model and is in good agreement with technology-CAD simulation data.

Original languageEnglish
Article number7448409
Pages (from-to)1840-1845
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume63
Issue number5
DOIs
Publication statusPublished - 1 May 2016
Externally publishedYes

Keywords

  • BSIM6
  • leakage
  • modeling
  • short channel
  • subsurface
  • zero-V MOSFET

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