Modelling electron trapping effects on gate lag in field effect devices

Saif Uz Zaman; Anthony E. Parker

Modelling electron trapping effects on gate lag in field effect devices

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

Abstract

Traps at the surface of devices cause delayed response of drain current to a step change of gate voltage. This is known as gate lag. Gate lag is usually caused by surface hole trapping. Traps at the surface are charged negatively during turn-off of the device. The negative charge turns the device further off. After turn-on, these negative charges decay by means of capturing holes, which turns the device further on. However, measurements have shown that electron trapping also occurs during gate pulsing which causes drain current to decrease after turn-on pulse. This paper aims to model this electron trapping effect and combine it with a previously developed hole trapping model.

Original language	English
Title of host publication	Proceedings of the WARS2006 Conference
Editors	Phil Wilkinson
Place of Publication	Canberra
Publisher	National Committee Radio Service
Number of pages	7
ISBN (Print)	0643093184
Publication status	Published - 2006
Event	Workshop on the Applications of Radio Science (6th : 2006) - Leura, NSW Duration: 15 Feb 2006 → 17 Feb 2006

Workshop

Workshop	Workshop on the Applications of Radio Science (6th : 2006)
City	Leura, NSW
Period	15/02/06 → 17/02/06

Access to Document

http://www.ips.gov.au/IPSHosted/NCRS/wars/wars2006/proceedings/final/c/zaman.pdf

Cite this

@inproceedings{082592325cb84894ad240f137f5068c8,

title = "Modelling electron trapping effects on gate lag in field effect devices",

abstract = "Traps at the surface of devices cause delayed response of drain current to a step change of gate voltage. This is known as gate lag. Gate lag is usually caused by surface hole trapping. Traps at the surface are charged negatively during turn-off of the device. The negative charge turns the device further off. After turn-on, these negative charges decay by means of capturing holes, which turns the device further on. However, measurements have shown that electron trapping also occurs during gate pulsing which causes drain current to decrease after turn-on pulse. This paper aims to model this electron trapping effect and combine it with a previously developed hole trapping model.",

author = "Zaman, {Saif Uz} and Parker, {Anthony E.}",

year = "2006",

language = "English",

isbn = "0643093184",

editor = "Phil Wilkinson",

booktitle = "Proceedings of the WARS2006 Conference",

publisher = "National Committee Radio Service",

note = "Workshop on the Applications of Radio Science (6th : 2006) ; Conference date: 15-02-2006 Through 17-02-2006",

}

Zaman, SU & Parker, AE 2006, Modelling electron trapping effects on gate lag in field effect devices. in P Wilkinson (ed.), Proceedings of the WARS2006 Conference. National Committee Radio Service, Canberra, Workshop on the Applications of Radio Science (6th : 2006), Leura, NSW, 15/02/06. <http://www.ips.gov.au/IPSHosted/NCRS/wars/wars2006/proceedings/final/c/zaman.pdf>

TY - GEN

T1 - Modelling electron trapping effects on gate lag in field effect devices

AU - Zaman, Saif Uz

AU - Parker, Anthony E.

PY - 2006

Y1 - 2006

N2 - Traps at the surface of devices cause delayed response of drain current to a step change of gate voltage. This is known as gate lag. Gate lag is usually caused by surface hole trapping. Traps at the surface are charged negatively during turn-off of the device. The negative charge turns the device further off. After turn-on, these negative charges decay by means of capturing holes, which turns the device further on. However, measurements have shown that electron trapping also occurs during gate pulsing which causes drain current to decrease after turn-on pulse. This paper aims to model this electron trapping effect and combine it with a previously developed hole trapping model.

AB - Traps at the surface of devices cause delayed response of drain current to a step change of gate voltage. This is known as gate lag. Gate lag is usually caused by surface hole trapping. Traps at the surface are charged negatively during turn-off of the device. The negative charge turns the device further off. After turn-on, these negative charges decay by means of capturing holes, which turns the device further on. However, measurements have shown that electron trapping also occurs during gate pulsing which causes drain current to decrease after turn-on pulse. This paper aims to model this electron trapping effect and combine it with a previously developed hole trapping model.

M3 - Conference proceeding contribution

SN - 0643093184

BT - Proceedings of the WARS2006 Conference

A2 - Wilkinson, Phil

PB - National Committee Radio Service

CY - Canberra

T2 - Workshop on the Applications of Radio Science (6th : 2006)

Y2 - 15 February 2006 through 17 February 2006

ER -

Modelling electron trapping effects on gate lag in field effect devices

Abstract

Workshop

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