A novel hard-decision scarce-state-transition (SST) type syndrome-former error-trellis decoding system of (n,n-1) convolutional codes with coherent BPSK signals for discrete memoryless channels is proposed. Simulation results show that the proposed decoding system gives indistinguishable error performance for the same code when compared with the SST-type register-exchange Viterbi decoding scheme. The proposed system retains the same number of binary comparisons as the syndrome-former trellis decoding method of Yamada et al. Like the original SST-type Viterbi decoding system, the proposed system also has the same advantage of drawing less power when implemented on CMOS LSI chips. A combination of the two techniques results a less complex and low power consumption decoding system. Guidelines are also given for the arrangement of eight-level soft-decision decoding of the proposed system.
|Number of pages||5|
|Journal||National Conference Publication - Institution of Engineers, Australia|
|Issue number||94 /9|
|Publication status||Published - 1994|