OK, if these CAD tools are so great, why isn't my chip design on schedule?

Neil Weste*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review

2 Citations (Scopus)

Abstract

This paper summarizes some of the problems facing designers of leading edge CMOS ICs in the 1990's.

Original languageEnglish
Title of host publicationIEEE International Conference on Computer Design
Subtitle of host publicationVLSI in Computers and Processors, 1994
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages2-8
Number of pages7
ISBN (Print)0818665653
Publication statusPublished - 1994
Externally publishedYes
EventProceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA
Duration: 10 Oct 199412 Oct 1994

Other

OtherProceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors
CityCambridge, MA, USA
Period10/10/9412/10/94

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