Performance analysis of a digital phase-locked loop with a hyperbolic nonlinearity

Sithamparanathan Kandeepan*, Sam Reisenfeld

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference proceeding contributionpeer-review

7 Citations (Scopus)

Abstract

The treatment of phase locked loops (PLL) has been heavily looked into over the past several decades on its performances and analysis, and is a very old topic. However the usage of it has never been reduced with the rapid evolvement of various open loop and closed loop systems. In this paper we analyse the performance of an arctan based digital phase locked loop (DPLL) with a hyperbolic nonlinearity for single-tone carrier tracking. We purposely introduce the nonlinearity for improved performance of the closed loop system. We look at the acquisition performance of the DPLL by considering the phase plane portrait and the lock-in range of the loop. The steady state (SS) performance of the loop is analysed by considering the open loop SS statistical distribution of the phase noise.

Original languageEnglish
Title of host publication2005 Fifth International Conference on Information, Communications and Signal Processing
Subtitle of host publicationICICS 2005: 6-9 December 2005, Bangkok, Thailand
Place of PublicationPiscataway, NJ
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages1035-1039
Number of pages5
ISBN (Print)0780392833, 9780780392830
Publication statusPublished - 2005
Externally publishedYes
Event2005 Fifth International Conference on Information, Communications and Signal Processing - Bangkok, Thailand
Duration: 6 Dec 20059 Dec 2005

Other

Other2005 Fifth International Conference on Information, Communications and Signal Processing
Country/TerritoryThailand
CityBangkok
Period6/12/059/12/05

Keywords

  • Arctan
  • Digital phase-locked loop (DPLL)
  • Hyperbolic
  • Phase plane (PP) portrait
  • PLL
  • Steady state (SS)

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