Problems in designing FET MMICs with low distortion

D. R. Webster*, D. G. Haigh, A. E. Parker, J. B. Scott

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)


The issue of designing circuits with low distortion, concentrating on the difficulties involved is addressed. These difficulties include the selection of suitable simulator device models, selection of a convenient characterization technique and the selection of a suitable topology and operating point. A description of the FET behavior and the issue of the mathematical representation of the FET behavior for analysis, design and device characterization are presented. Lastly, a discussion of some of the issues in the design of linear and nonlinear circuits for low distortion is given.

Original languageEnglish
JournalIEE Colloquium (Digest)
Issue number92
Publication statusPublished - 1994
Externally publishedYes


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