Abstract
The issue of designing circuits with low distortion, concentrating on the difficulties involved is addressed. These difficulties include the selection of suitable simulator device models, selection of a convenient characterization technique and the selection of a suitable topology and operating point. A description of the FET behavior and the issue of the mathematical representation of the FET behavior for analysis, design and device characterization are presented. Lastly, a discussion of some of the issues in the design of linear and nonlinear circuits for low distortion is given.
Original language | English |
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Journal | IEE Colloquium (Digest) |
Issue number | 92 |
Publication status | Published - 1994 |
Externally published | Yes |