The issue of designing circuits with low distortion, concentrating on the difficulties involved is addressed. These difficulties include the selection of suitable simulator device models, selection of a convenient characterization technique and the selection of a suitable topology and operating point. A description of the FET behavior and the issue of the mathematical representation of the FET behavior for analysis, design and device characterization are presented. Lastly, a discussion of some of the issues in the design of linear and nonlinear circuits for low distortion is given.
|Journal||IEE Colloquium (Digest)|
|Publication status||Published - 1994|