Robust surface-potential-based compact model for gan hemt ic design

Sourabh Khandelwal, Chandan Yadav, Shantanu Agnihotri, Yogesh Singh Chauhan, Arnaud Curutchet, Thomas Zimmer, Jean Claude De Jaeger, Nicolas Defrance, Tor A. Fjeldly

Research output: Contribution to journalArticle

64 Citations (Scopus)

Abstract

We present an accurate and robust surface-potential-based compact model for simulation of circuits designed with GaN-based high-electron mobility transistors (GaN HEMTs). An accurate analytical surface-potential calculation, which we developed, is used to develop the drain and gate current model. The model is in excellent agreement with experimental data for both drain and gate current in all regions of device operation. We show the correct physical behavior and mathematical robustness of the model by performing various benchmark tests, such as DC and AC symmetry tests, reciprocity test, and harmonic balance simulations test. To the best of our knowledge, this is the first time a GaN HEMT compact model passing a range of benchmark tests has been presented.

Original languageEnglish
Article number6542761
Pages (from-to)3216-3222
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume60
Issue number10
DOIs
Publication statusPublished - 2013
Externally publishedYes

Keywords

  • Compact model
  • Gan-based high-electron mobility transistor (gan hemt)
  • Spice model
  • Surface potential

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