Self-aligned gate-last process for quantum-well InAs transistor on insulator

Qi Cheng, Zilun Wang, Kazy Shariar, Sourabh Khandelwal, Yuping Zeng*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


This paper presents a promising technology to make quantum-well InAs transistors on SiO2/Si substrate by using a self-aligned gate-last fabrication technique. The full self-aligned fabrication process is demonstrated, and the fabricated device is characterized. A 2-D TCAD simulation is then performed based on the experimental data to understand the operation of the InAs transistors. We explore further optimizations for this technology through TCAD simulations, and it is found that with optimizations in materials, device geometry and fabrication, significant boost in RF performances is possible with these devices.

Original languageEnglish
Pages (from-to)42-47
Number of pages6
JournalMicroelectronic Engineering
Publication statusPublished - 5 May 2018


  • III–V material
  • MOSFET fabrication
  • self-aligned process
  • XOI transistor

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