The authors describe features of the I-machine family, a third-generation symbolic processor architecture. The architecture is based on experience gained with the Symbolics 3600 and is targeted for a single-chip CMOS VLSI implementation.
|Title of host publication||IEEE International Conference on Computer Design, VLSI in computers & processors : ICCD '87, Rye Town Hilton, Rye Brook, N.Y.|
|Place of Publication||Washington, DC|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|Number of pages||4|
|Publication status||Published - 1987|