Timespot1: a 28 nm CMOS pixel read-out ASIC for 4D tracking at high rates

We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a 32 × 32 pixel matrix with a pitch of 35 μm. Timespot1 is the first small-size prototype, conceived to readout fine-pitch pixels with single-hit time resolution below 50 ps_rms and input rates of several hundreds of kilohertz per pixel. Such experimental conditions will be typical of the next generation of high-luminosity collider experiments, from the LHC run5 and beyond. Each pixel of the ASIC includes a charge amplifier, a discriminator, and a Time-to-Digital Converter with a time resolution indicatively of 22.6 ps_rms and maximum readout rates (per pixel) of 3 MHz. To respect system-level constraints, the timing performance has been obtained keeping the power budget per pixel below 40 mW. The ASIC has been tested and characterised in the laboratory concerning its performance in terms of time resolution, power budget and sustainable rates. The ASIC will be hybridized on a matched 32 × 32 pixel sensor matrix and will be tested under laser beam and Minimum Ionizing Particles in the laboratory and at test beams. In this paper we present a description of the ASIC operation and the first results obtained from characterization tests concerning its performance.