TOPOLOGIZER: an expert system translator of transistor connectivity to symbolic cell layout

Paul W. Kollaritsch; Neil H E Weste

doi:10.1109/JSSC.1985.1052385

TOPOLOGIZER: an expert system translator of transistor connectivity to symbolic cell layout

Paul W. Kollaritsch, Neil H E Weste

Research output: Contribution to journal › Article › peer-review

26 Citations (Scopus)

Abstract

TOPOLOGIZER is an expert system for the design of CMOS cells. TOPOLOGIZER uses heuristics (rules) specified by an expert designer to produce a custom-fit symbolic leaf-cell from a transistor connection description and a description of the environment in which the cell will reside. A symbolic layout system converts the symbolic description to a mask level description.

Original language	English
Pages (from-to)	799-804
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	20
Issue number	3
DOIs	https://doi.org/10.1109/JSSC.1985.1052385
Publication status	Published - 1985
Externally published	Yes

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10.1109/JSSC.1985.1052385

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abstract = "TOPOLOGIZER is an expert system for the design of CMOS cells. TOPOLOGIZER uses heuristics (rules) specified by an expert designer to produce a custom-fit symbolic leaf-cell from a transistor connection description and a description of the environment in which the cell will reside. A symbolic layout system converts the symbolic description to a mask level description.",

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TOPOLOGIZER: an expert system translator of transistor connectivity to symbolic cell layout

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