Virtual grid symbolic layout

David Tana; Neil Weste

Virtual grid symbolic layout

David Tana^*, Neil Weste

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding contribution › peer-review

6 Citations (Scopus)

Abstract

The authors describe the compaction methodology and certain features of the compactors used at Symbolics. These tools have been used as the sole physical layout tool for a 300,000-transistor single-chip Lisp microprocessor. The three compactors and compactor tools amount to 6000 lines of Common Lisp on a Symbolics Lisp Machine. The code makes heavy use of the object-oriented Flavor system. Times have been measured for a Symbolics 3640 with 24 Mb of RAM running Genera 7. 1.

Original language	English
Title of host publication	Unknown Host Publication Title
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	192-196
Number of pages	5
ISBN (Print)	0818608021
Publication status	Published - 1987
Externally published	Yes

Cite this

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title = "Virtual grid symbolic layout",

abstract = "The authors describe the compaction methodology and certain features of the compactors used at Symbolics. These tools have been used as the sole physical layout tool for a 300,000-transistor single-chip Lisp microprocessor. The three compactors and compactor tools amount to 6000 lines of Common Lisp on a Symbolics Lisp Machine. The code makes heavy use of the object-oriented Flavor system. Times have been measured for a Symbolics 3640 with 24 Mb of RAM running Genera 7. 1.",

author = "David Tana and Neil Weste",

year = "1987",

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TY - GEN

T1 - Virtual grid symbolic layout

AU - Tana, David

AU - Weste, Neil

PY - 1987

Y1 - 1987

N2 - The authors describe the compaction methodology and certain features of the compactors used at Symbolics. These tools have been used as the sole physical layout tool for a 300,000-transistor single-chip Lisp microprocessor. The three compactors and compactor tools amount to 6000 lines of Common Lisp on a Symbolics Lisp Machine. The code makes heavy use of the object-oriented Flavor system. Times have been measured for a Symbolics 3640 with 24 Mb of RAM running Genera 7. 1.

AB - The authors describe the compaction methodology and certain features of the compactors used at Symbolics. These tools have been used as the sole physical layout tool for a 300,000-transistor single-chip Lisp microprocessor. The three compactors and compactor tools amount to 6000 lines of Common Lisp on a Symbolics Lisp Machine. The code makes heavy use of the object-oriented Flavor system. Times have been measured for a Symbolics 3640 with 24 Mb of RAM running Genera 7. 1.

UR - https://www.scopus.com/pages/publications/0023531373

M3 - Conference proceeding contribution

AN - SCOPUS:0023531373

SN - 0818608021

SP - 192

EP - 196

BT - Unknown Host Publication Title

PB - Institute of Electrical and Electronics Engineers (IEEE)

ER -

Virtual grid symbolic layout

Abstract

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